28 lines
778 B
Plaintext
28 lines
778 B
Plaintext
Synopsys ARC Local Timer with Interrupt Capabilities
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- Found on all ARC CPUs (ARC700/ARCHS)
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- Can be optionally programmed to interrupt on Limit
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- Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically
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TIMER0 used as clockevent provider (true for all ARC cores)
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TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)
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Required properties:
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- compatible : should be "snps,arc-timer"
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- interrupts : single Interrupt going into parent intc
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(16 for ARCHS cores, 3 for ARC700 cores)
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- clocks : phandle to the source clock
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Example:
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timer0 {
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compatible = "snps,arc-timer";
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interrupts = <3>;
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interrupt-parent = <&core_intc>;
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clocks = <&core_clk>;
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};
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timer1 {
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compatible = "snps,arc-timer";
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clocks = <&core_clk>;
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};
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