36 lines
1.4 KiB
Plaintext
36 lines
1.4 KiB
Plaintext
* MediaTek JPEG Encoder
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MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
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Required properties:
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- compatible : "mediatek,mt2701-jpgenc"
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followed by "mediatek,mtk-jpgenc"
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- reg : physical base address of the JPEG encoder registers and length of
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memory mapped region.
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- interrupts : interrupt number to the interrupt controller.
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- clocks: device clocks, see
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Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
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- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
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- power-domains: a phandle to the power domain, see
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Documentation/devicetree/bindings/power/power_domain.txt for details.
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- mediatek,larb: must contain the local arbiters in the current SoCs, see
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Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
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for details.
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- iommus: should point to the respective IOMMU block with master port as
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argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
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for details.
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Example:
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jpegenc: jpegenc@1500a000 {
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compatible = "mediatek,mt2701-jpgenc",
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"mediatek,mtk-jpgenc";
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reg = <0 0x1500a000 0 0x1000>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&imgsys CLK_IMG_VENC>;
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clock-names = "jpgenc";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
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mediatek,larb = <&larb2>;
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iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
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<&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
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};
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