75 lines
1.6 KiB
YAML
75 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings
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maintainers:
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- Rayn Chen <rayn_chen@aspeedtech.com>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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compatible:
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enum:
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- aspeed,ast2400-i2c-bus
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- aspeed,ast2500-i2c-bus
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- aspeed,ast2600-i2c-bus
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reg:
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minItems: 1
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items:
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- description: address offset and range of bus
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- description: address offset and range of bus buffer
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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description:
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root clock of bus, should reference the APB
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clock in the second cell
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resets:
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maxItems: 1
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bus-frequency:
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minimum: 500
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maximum: 4000000
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default: 100000
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description: frequency of the bus clock in Hz defaults to 100 kHz when not
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specified
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multi-master:
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type: boolean
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description:
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states that there is another master active on this bus
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required:
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- reg
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- compatible
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- clocks
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- resets
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/aspeed-clock.h>
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i2c0: i2c-bus@40 {
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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compatible = "aspeed,ast2500-i2c-bus";
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reg = <0x40 0x40>;
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clocks = <&syscon ASPEED_CLK_APB>;
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resets = <&syscon ASPEED_RESET_I2C>;
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bus-frequency = <100000>;
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interrupts = <0>;
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interrupt-parent = <&i2c_ic>;
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};
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