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The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line provider so add respective reset-cells property to fix: arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000: '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210920144944.162431-1-krzysztof.kozlowski@canonical.com Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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fu540-prci.yaml | ||
fu740-prci.yaml |