378 lines
8.3 KiB
C
378 lines
8.3 KiB
C
/*
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* Hammerhead board-specific flash initialization
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*
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* Copyright (C) 2008 Miromico AG
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/usb/isp116x.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <mach/portmux.h>
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#include <mach/at32ap700x.h>
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#include <mach/smc.h>
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#include "../../mach-at32ap/clock.h"
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#include "flash.h"
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#define HAMMERHEAD_USB_PERIPH_GCLK0 0x40000000
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#define HAMMERHEAD_USB_PERIPH_CS2 0x02000000
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#define HAMMERHEAD_USB_PERIPH_EXTINT0 0x02000000
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#define HAMMERHEAD_FPGA_PERIPH_MOSI 0x00000002
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#define HAMMERHEAD_FPGA_PERIPH_SCK 0x00000020
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#define HAMMERHEAD_FPGA_PERIPH_EXTINT3 0x10000000
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static struct smc_timing flash_timing __initdata = {
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.ncs_read_setup = 0,
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.nrd_setup = 40,
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.ncs_write_setup = 0,
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.nwe_setup = 10,
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.ncs_read_pulse = 80,
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.nrd_pulse = 40,
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.ncs_write_pulse = 65,
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.nwe_pulse = 55,
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.read_cycle = 120,
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.write_cycle = 120,
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};
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static struct smc_config flash_config __initdata = {
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.bus_width = 2,
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.nrd_controlled = 1,
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.nwe_controlled = 1,
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.byte_write = 1,
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};
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static struct mtd_partition flash_parts[] = {
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{
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.name = "u-boot",
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.offset = 0x00000000,
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.size = 0x00020000, /* 128 KiB */
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "root",
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.offset = 0x00020000,
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.size = 0x007d0000,
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},
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{
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.name = "env",
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.offset = 0x007f0000,
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.size = 0x00010000,
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.mask_flags = MTD_WRITEABLE,
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},
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};
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static struct physmap_flash_data flash_data = {
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.width = 2,
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.nr_parts = ARRAY_SIZE(flash_parts),
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.parts = flash_parts,
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};
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static struct resource flash_resource = {
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.start = 0x00000000,
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.end = 0x007fffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device flash_device = {
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.name = "physmap-flash",
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.id = 0,
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.resource = &flash_resource,
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.num_resources = 1,
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.dev = { .platform_data = &flash_data, },
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};
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#ifdef CONFIG_BOARD_HAMMERHEAD_USB
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static struct smc_timing isp1160_timing __initdata = {
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.ncs_read_setup = 75,
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.nrd_setup = 75,
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.ncs_write_setup = 75,
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.nwe_setup = 75,
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/* We use conservative timing settings, as the minimal settings aren't
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stable. There may be room for tweaking. */
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.ncs_read_pulse = 75, /* min. 33ns */
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.nrd_pulse = 75, /* min. 33ns */
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.ncs_write_pulse = 75, /* min. 26ns */
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.nwe_pulse = 75, /* min. 26ns */
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.read_cycle = 225, /* min. 143ns */
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.write_cycle = 225, /* min. 136ns */
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};
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static struct smc_config isp1160_config __initdata = {
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.bus_width = 2,
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.nrd_controlled = 1,
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.nwe_controlled = 1,
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.byte_write = 0,
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};
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/*
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* The platform delay function is only used to enforce the strange
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* read to write delay. This can not be configured in the SMC. All other
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* timings are controlled by the SMC (see timings obove)
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* So in isp116x-hcd.c we should comment out USE_PLATFORM_DELAY
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*/
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void isp116x_delay(struct device *dev, int delay)
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{
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if (delay > 150)
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ndelay(delay - 150);
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}
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static struct isp116x_platform_data isp1160_data = {
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.sel15Kres = 1, /* use internal downstream resistors */
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.oc_enable = 0, /* external overcurrent detection */
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.int_edge_triggered = 0, /* interrupt is level triggered */
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.int_act_high = 0, /* interrupt is active low */
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.delay = isp116x_delay, /* platform delay function */
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};
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static struct resource isp1160_resource[] = {
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{
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.start = 0x08000000,
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.end = 0x08000001,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x08000002,
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.end = 0x08000003,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 64,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device isp1160_device = {
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.name = "isp116x-hcd",
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.id = 0,
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.resource = isp1160_resource,
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.num_resources = 3,
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.dev = {
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.platform_data = &isp1160_data,
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},
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};
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#endif
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#ifdef CONFIG_BOARD_HAMMERHEAD_USB
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static int __init hammerhead_usbh_init(void)
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{
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struct clk *gclk;
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struct clk *osc;
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int ret;
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/* setup smc for usbh */
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smc_set_timing(&isp1160_config, &isp1160_timing);
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ret = smc_set_configuration(2, &isp1160_config);
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if (ret < 0) {
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printk(KERN_ERR
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"hammerhead: failed to set ISP1160 USBH timing\n");
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return ret;
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}
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/* setup gclk0 to run from osc1 */
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gclk = clk_get(NULL, "gclk0");
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if (IS_ERR(gclk))
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goto err_gclk;
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osc = clk_get(NULL, "osc1");
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if (IS_ERR(osc))
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goto err_osc;
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if (clk_set_parent(gclk, osc)) {
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pr_debug("hammerhead: failed to set osc1 for USBH clock\n");
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goto err_set_clk;
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}
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/* set clock to 6MHz */
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clk_set_rate(gclk, 6000000);
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/* and enable */
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clk_enable(gclk);
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/* select GCLK0 peripheral function */
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at32_select_periph(GPIO_PIOA_BASE, HAMMERHEAD_USB_PERIPH_GCLK0,
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GPIO_PERIPH_A, 0);
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/* enable CS2 peripheral function */
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at32_select_periph(GPIO_PIOE_BASE, HAMMERHEAD_USB_PERIPH_CS2,
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GPIO_PERIPH_A, 0);
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/* H_WAKEUP must be driven low */
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at32_select_gpio(GPIO_PIN_PA(8), AT32_GPIOF_OUTPUT);
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/* Select EXTINT0 for PB25 */
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at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_USB_PERIPH_EXTINT0,
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GPIO_PERIPH_A, 0);
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/* register usbh device driver */
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platform_device_register(&isp1160_device);
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err_set_clk:
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clk_put(osc);
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err_osc:
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clk_put(gclk);
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err_gclk:
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return ret;
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}
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#endif
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#ifdef CONFIG_BOARD_HAMMERHEAD_FPGA
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static struct smc_timing fpga_timing __initdata = {
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.ncs_read_setup = 16,
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.nrd_setup = 32,
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.ncs_read_pulse = 48,
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.nrd_pulse = 32,
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.read_cycle = 64,
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.ncs_write_setup = 16,
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.nwe_setup = 16,
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.ncs_write_pulse = 32,
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.nwe_pulse = 32,
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.write_cycle = 64,
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};
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static struct smc_config fpga_config __initdata = {
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.bus_width = 4,
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.nrd_controlled = 1,
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.nwe_controlled = 1,
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.byte_write = 0,
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};
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static struct resource hh_fpga0_resource[] = {
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{
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.start = 0xffe00400,
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.end = 0xffe00400 + 0x3ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 4,
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.end = 4,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = 0x0c000000,
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.end = 0x0c000100,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 67,
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.end = 67,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 hh_fpga0_dma_mask = DMA_32BIT_MASK;
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static struct platform_device hh_fpga0_device = {
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.name = "hh_fpga",
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.id = 0,
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.dev = {
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.dma_mask = &hh_fpga0_dma_mask,
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.coherent_dma_mask = DMA_32BIT_MASK,
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},
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.resource = hh_fpga0_resource,
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.num_resources = ARRAY_SIZE(hh_fpga0_resource),
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};
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static struct clk hh_fpga0_spi_clk = {
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.name = "spi_clk",
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.dev = &hh_fpga0_device.dev,
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.mode = pba_clk_mode,
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.get_rate = pba_clk_get_rate,
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.index = 1,
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};
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struct platform_device *__init at32_add_device_hh_fpga(void)
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{
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/* Select peripheral functionallity for SPI SCK and MOSI */
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at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_SCK,
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GPIO_PERIPH_B, 0);
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at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_MOSI,
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GPIO_PERIPH_B, 0);
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/* reserve all other needed gpio
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* We have on board pull ups, so there is no need
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* to enable gpio pull ups */
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/* INIT_DONE (input) */
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at32_select_gpio(GPIO_PIN_PB(0), 0);
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/* nSTATUS (input) */
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at32_select_gpio(GPIO_PIN_PB(2), 0);
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/* nCONFIG (output, low) */
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at32_select_gpio(GPIO_PIN_PB(3), AT32_GPIOF_OUTPUT);
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/* CONF_DONE (input) */
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at32_select_gpio(GPIO_PIN_PB(4), 0);
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/* Select EXTINT3 for PB28 (Interrupt from FPGA) */
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at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_EXTINT3,
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GPIO_PERIPH_A, 0);
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/* Get our parent clock */
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hh_fpga0_spi_clk.parent = clk_get(NULL, "pba");
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clk_put(hh_fpga0_spi_clk.parent);
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/* Register clock in at32 clock tree */
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at32_clk_register(&hh_fpga0_spi_clk);
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platform_device_register(&hh_fpga0_device);
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return &hh_fpga0_device;
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}
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#endif
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/* This needs to be called after the SMC has been initialized */
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static int __init hammerhead_flash_init(void)
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{
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int ret;
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smc_set_timing(&flash_config, &flash_timing);
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ret = smc_set_configuration(0, &flash_config);
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if (ret < 0) {
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printk(KERN_ERR "hammerhead: failed to set NOR flash timing\n");
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return ret;
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}
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platform_device_register(&flash_device);
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#ifdef CONFIG_BOARD_HAMMERHEAD_USB
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hammerhead_usbh_init();
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#endif
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#ifdef CONFIG_BOARD_HAMMERHEAD_FPGA
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/* Setup SMC for FPGA interface */
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smc_set_timing(&fpga_config, &fpga_timing);
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ret = smc_set_configuration(3, &fpga_config);
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#endif
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if (ret < 0) {
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printk(KERN_ERR "hammerhead: failed to set FPGA timing\n");
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return ret;
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}
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return 0;
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}
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device_initcall(hammerhead_flash_init);
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