99 lines
3.7 KiB
C
99 lines
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Framework for buffer objects that can be shared across devices/subsystems.
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*
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* Copyright(C) 2015 Intel Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _DMA_BUF_UAPI_H_
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#define _DMA_BUF_UAPI_H_
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#include <linux/types.h>
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/**
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* struct dma_buf_sync - Synchronize with CPU access.
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*
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* When a DMA buffer is accessed from the CPU via mmap, it is not always
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* possible to guarantee coherency between the CPU-visible map and underlying
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* memory. To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
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* any CPU access to give the kernel the chance to shuffle memory around if
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* needed.
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*
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* Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
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* with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
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* access is complete, the client should call DMA_BUF_IOCTL_SYNC with
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* DMA_BUF_SYNC_END and the same read/write flags.
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*
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* The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
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* coherency. It does not prevent other processes or devices from
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* accessing the memory at the same time. If synchronization with a GPU or
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* other device driver is required, it is the client's responsibility to
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* wait for buffer to be ready for reading or writing before calling this
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* ioctl with DMA_BUF_SYNC_START. Likewise, the client must ensure that
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* follow-up work is not submitted to GPU or other device driver until
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* after this ioctl has been called with DMA_BUF_SYNC_END?
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*
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* If the driver or API with which the client is interacting uses implicit
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* synchronization, waiting for prior work to complete can be done via
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* poll() on the DMA buffer file descriptor. If the driver or API requires
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* explicit synchronization, the client may have to wait on a sync_file or
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* other synchronization primitive outside the scope of the DMA buffer API.
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*/
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struct dma_buf_sync {
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/**
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* @flags: Set of access flags
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*
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* DMA_BUF_SYNC_START:
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* Indicates the start of a map access session.
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*
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* DMA_BUF_SYNC_END:
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* Indicates the end of a map access session.
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*
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* DMA_BUF_SYNC_READ:
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* Indicates that the mapped DMA buffer will be read by the
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* client via the CPU map.
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*
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* DMA_BUF_SYNC_WRITE:
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* Indicates that the mapped DMA buffer will be written by the
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* client via the CPU map.
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*
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* DMA_BUF_SYNC_RW:
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* An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
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*/
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__u64 flags;
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};
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#define DMA_BUF_SYNC_READ (1 << 0)
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#define DMA_BUF_SYNC_WRITE (2 << 0)
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#define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
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#define DMA_BUF_SYNC_START (0 << 2)
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#define DMA_BUF_SYNC_END (1 << 2)
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#define DMA_BUF_SYNC_VALID_FLAGS_MASK \
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(DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
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#define DMA_BUF_NAME_LEN 32
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#define DMA_BUF_BASE 'b'
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#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
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/* 32/64bitness of this uapi was botched in android, there's no difference
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* between them in actual uapi, they're just different numbers.
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*/
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#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
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#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
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#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
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#endif
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