140 lines
3.2 KiB
C
140 lines
3.2 KiB
C
/* Various workarounds for chipset bugs.
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This code runs very early and can't use the regular PCI subsystem
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The entries are keyed to PCI bridges which usually identify chipsets
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uniquely.
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This is only for whole classes of chipsets with specific problems which
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need early invasive action (e.g. before the timers are initialized).
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Most PCI device specific workarounds can be done later and should be
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in standard PCI quirks
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Mainboard specific bugs should be handled by DMI entries.
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CPU specific bugs in setup.c */
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/pci_ids.h>
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#include <asm/pci-direct.h>
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#include <asm/proto.h>
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#include <asm/dma.h>
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static void __init via_bugs(void)
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{
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#ifdef CONFIG_IOMMU
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if ((end_pfn > MAX_DMA32_PFN || force_iommu) &&
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!iommu_aperture_allowed) {
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printk(KERN_INFO
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"Looks like a VIA chipset. Disabling IOMMU. Override with iommu=allowed\n");
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iommu_aperture_disabled = 1;
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}
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#endif
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}
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#ifdef CONFIG_ACPI
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static int __init nvidia_hpet_check(struct acpi_table_header *header)
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{
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return 0;
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}
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#endif
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static void __init nvidia_bugs(void)
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{
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#ifdef CONFIG_ACPI
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/*
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* All timer overrides on Nvidia are
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* wrong unless HPET is enabled.
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* Unfortunately that's not true on many Asus boards.
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* We don't know yet how to detect this automatically, but
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* at least allow a command line override.
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*/
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if (acpi_use_timer_override)
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return;
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if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
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acpi_skip_timer_override = 1;
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printk(KERN_INFO "Nvidia board "
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"detected. Ignoring ACPI "
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"timer override.\n");
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printk(KERN_INFO "If you got timer trouble "
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"try acpi_use_timer_override\n");
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}
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#endif
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/* RED-PEN skip them on mptables too? */
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}
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static void __init ati_bugs(void)
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{
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if (timer_over_8254 == 1) {
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timer_over_8254 = 0;
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printk(KERN_INFO
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"ATI board detected. Disabling timer routing over 8254.\n");
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}
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}
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static void intel_bugs(void)
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{
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u16 device = read_pci_config_16(0, 0, 0, PCI_DEVICE_ID);
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#ifdef CONFIG_SMP
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if (device == PCI_DEVICE_ID_INTEL_E7320_MCH ||
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device == PCI_DEVICE_ID_INTEL_E7520_MCH ||
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device == PCI_DEVICE_ID_INTEL_E7525_MCH)
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quirk_intel_irqbalance();
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#endif
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}
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struct chipset {
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u16 vendor;
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void (*f)(void);
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};
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static struct chipset early_qrk[] __initdata = {
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{ PCI_VENDOR_ID_NVIDIA, nvidia_bugs },
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{ PCI_VENDOR_ID_VIA, via_bugs },
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{ PCI_VENDOR_ID_ATI, ati_bugs },
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{ PCI_VENDOR_ID_INTEL, intel_bugs},
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{}
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};
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void __init early_quirks(void)
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{
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int num, slot, func;
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if (!early_pci_allowed())
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return;
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/* Poor man's PCI discovery */
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for (num = 0; num < 32; num++) {
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for (slot = 0; slot < 32; slot++) {
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for (func = 0; func < 8; func++) {
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u32 class;
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u32 vendor;
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u8 type;
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int i;
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class = read_pci_config(num,slot,func,
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PCI_CLASS_REVISION);
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if (class == 0xffffffff)
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break;
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if ((class >> 16) != PCI_CLASS_BRIDGE_PCI)
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continue;
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vendor = read_pci_config(num, slot, func,
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PCI_VENDOR_ID);
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vendor &= 0xffff;
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for (i = 0; early_qrk[i].f; i++)
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if (early_qrk[i].vendor == vendor) {
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early_qrk[i].f();
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return;
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}
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type = read_pci_config_byte(num, slot, func,
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PCI_HEADER_TYPE);
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if (!(type & 0x80))
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break;
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}
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}
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}
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}
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