.. |
smu_6_0_d.h
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drm/amd/amdgpu: Introduction of SI registers (v2)
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2016-11-11 10:21:07 -05:00 |
smu_6_0_sh_mask.h
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drm/amd/amdgpu: Introduction of SI registers (v2)
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2016-11-11 10:21:07 -05:00 |
smu_7_0_0_d.h
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…
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smu_7_0_0_sh_mask.h
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…
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smu_7_0_1_d.h
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drm/amdgpu: add current_pg_status register define for smu7.1
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2017-02-08 17:20:22 -05:00 |
smu_7_0_1_sh_mask.h
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drm/amd/powerplay: add CI asics support to smumgr (v3)
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2017-09-26 13:06:57 -04:00 |
smu_7_1_0_d.h
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drm/amdgpu: add SMU 7.1.0 register headers
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2015-06-03 21:03:04 -04:00 |
smu_7_1_0_enum.h
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drm/amdgpu: add SMU 7.1.0 register headers
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2015-06-03 21:03:04 -04:00 |
smu_7_1_0_sh_mask.h
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drm/amdgpu: add SMU 7.1.0 register headers
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2015-06-03 21:03:04 -04:00 |
smu_7_1_1_d.h
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drm/amdgpu: read hw register to check pg status.
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2017-02-13 12:43:04 -05:00 |
smu_7_1_1_enum.h
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drm/amdgpu: add SMU 7.1.1 register headers
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2015-06-03 21:03:05 -04:00 |
smu_7_1_1_sh_mask.h
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drm/amdgpu: read hw register to check pg status.
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2017-02-13 12:43:04 -05:00 |
smu_7_1_2_d.h
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drm/amd/powerplay: add a new register define for APU in VI.
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2017-03-29 23:54:06 -04:00 |
smu_7_1_2_enum.h
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drm/amdgpu: add SMU 7.1.2 register headers
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2015-06-03 21:03:05 -04:00 |
smu_7_1_2_sh_mask.h
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drm/amdgpu: read hw register to check pg status.
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2017-02-13 12:43:04 -05:00 |
smu_7_1_3_d.h
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drm/amd/pp: Export registers for read vddc on VI/Vega10
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2018-02-19 14:17:49 -05:00 |
smu_7_1_3_enum.h
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drm/amdgpu: Add Fiji smu 7.1.3 headers (v2)
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2015-08-17 16:50:25 -04:00 |
smu_7_1_3_sh_mask.h
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drm/amd/pp: Export registers for read vddc on VI/Vega10
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2018-02-19 14:17:49 -05:00 |
smu_8_0_d.h
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drm/amdgpu: add SMU 8.0 register headers
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2015-06-03 21:03:06 -04:00 |
smu_8_0_enum.h
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drm/amdgpu: add SMU 8.0 register headers
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2015-06-03 21:03:06 -04:00 |
smu_8_0_sh_mask.h
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drm/amdgpu: add SMU 8.0 register headers
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2015-06-03 21:03:06 -04:00 |