OpenCloudOS-Kernel/drivers/gpu/drm/tegra
Dave Airlie c861acc4d5 drm/tegra: Changes for v4.2-rc1
This contains a couple of mostly fixes for issues that have crept up in
 recent versions of linux-next. One issue is that DP AUX transactions of
 more than 4 bytes will access the wrong FIFO registers and hence become
 corrupt. Another fix is required to restore functionality of Tegra20 if
 using the GART. The current code expects the IOMMU aperture to be the
 complete 4 GiB address space, whereas the GART on Tegra20 only provides
 a 128 MiB aperture. One more issue with IOMMU support is that on 64-bit
 ARM, swiotlb is the default IOMMU implementation backing the DMA API. A
 side-effect of that is that when dma_map_sg() is called to flush caches
 (yes, this is a bit of a hack, but ARM does not provide a better API),
 swiotlb will immediately run out of memory because its bounce buffer is
 too small to make a framebuffer.
 
 Finally I've included a mostly cosmetic fix that stores register values
 in u32 rather than unsigned long to avoid sign-extension issues on 64-
 bit ARM. This is only a precaution since it hasn't caused any issues
 (yet).
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Merge tag 'drm/tegra/for-4.2-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.2-rc1

This contains a couple of mostly fixes for issues that have crept up in
recent versions of linux-next. One issue is that DP AUX transactions of
more than 4 bytes will access the wrong FIFO registers and hence become
corrupt. Another fix is required to restore functionality of Tegra20 if
using the GART. The current code expects the IOMMU aperture to be the
complete 4 GiB address space, whereas the GART on Tegra20 only provides
a 128 MiB aperture. One more issue with IOMMU support is that on 64-bit
ARM, swiotlb is the default IOMMU implementation backing the DMA API. A
side-effect of that is that when dma_map_sg() is called to flush caches
(yes, this is a bit of a hack, but ARM does not provide a better API),
swiotlb will immediately run out of memory because its bounce buffer is
too small to make a framebuffer.

Finally I've included a mostly cosmetic fix that stores register values
in u32 rather than unsigned long to avoid sign-extension issues on 64-
bit ARM. This is only a precaution since it hasn't caused any issues
(yet).

* tag 'drm/tegra/for-4.2-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: dpaux: Registers are 32-bit
  drm/tegra: gem: Flush pages after allocation
  drm/tegra: gem: Take into account IOMMU aperture
  drm/tegra: dpaux: Fix transfers larger than 4 bytes
2015-06-18 12:53:54 +10:00
..
Kconfig drm/tegra: Depend on COMMON_CLK 2014-11-13 16:10:27 +01:00
Makefile drm/tegra: Remove host1x drm_bus implementation 2014-06-05 23:14:46 +02:00
dc.c drm/tegra: Changes for v4.1-rc1 2015-04-08 11:13:06 +10:00
dc.h drm/tegra: dc: Implement hardware VBLANK counter 2015-04-02 18:46:21 +02:00
dpaux.c drm/tegra: dpaux: Registers are 32-bit 2015-06-12 16:26:04 +02:00
dpaux.h drm/tegra: dp: Support address-only I2C-over-AUX transactions 2014-04-08 16:12:36 +02:00
drm.c drm/tegra: Changes for v4.2-rc1 2015-06-18 12:53:54 +10:00
drm.h drm/tegra: dc: Remove unused function 2015-04-02 18:49:21 +02:00
dsi.c drm/tegra: dc: Unify enabling the display controller 2015-01-27 10:14:58 +01:00
dsi.h drm/tegra: dsi: Implement host transfers 2014-11-13 16:12:36 +01:00
fb.c drm/tegra: Move tegra_drm_mode_funcs to the core 2015-01-27 10:14:44 +01:00
gem.c drm/tegra: gem: Flush pages after allocation 2015-06-12 16:25:40 +02:00
gem.h drm/tegra: gem: Use more consistent data types 2014-11-13 16:18:32 +01:00
gr2d.c drm/tegra: add MODULE_DEVICE_TABLEs 2014-08-04 10:07:39 +02:00
gr2d.h drm/tegra: Use symbolic names for gr2d registers 2013-10-31 09:55:44 +01:00
gr3d.c ARM: SoC cleanups for 3.17 2014-08-08 11:00:26 -07:00
gr3d.h drm/tegra: Add 3D support 2013-10-31 09:55:45 +01:00
hdmi.c drm/tegra: hdmi: Name register fields consistently 2015-04-02 18:49:23 +02:00
hdmi.h drm/tegra: hdmi: Name register fields consistently 2015-04-02 18:49:23 +02:00
mipi-phy.c drm/tegra: dsi: Adjust D-PHY timing 2015-01-27 10:14:40 +01:00
mipi-phy.h drm/tegra: Relicense under GPL v2 2014-04-04 09:12:51 +02:00
output.c drm/tegra: Atomic conversion, phase 1 2015-01-27 10:14:50 +01:00
rgb.c drm/tegra: dc: Unify enabling the display controller 2015-01-27 10:14:58 +01:00
sor.c drm/tegra: sor: Reset during initialization 2015-04-02 18:49:24 +02:00
sor.h drm/tegra: sor - Add CRC debugfs support 2014-06-05 23:09:17 +02:00