223 lines
9.4 KiB
Plaintext
223 lines
9.4 KiB
Plaintext
What: /sys/class/habanalabs/hl<n>/armcp_kernel_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Version of the Linux kernel running on the device's CPU.
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Will be DEPRECATED in Linux kernel version 5.10, and be
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replaced with cpucp_kernel_ver
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What: /sys/class/habanalabs/hl<n>/armcp_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Version of the application running on the device's CPU
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Will be DEPRECATED in Linux kernel version 5.10, and be
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replaced with cpucp_ver
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What: /sys/class/habanalabs/hl<n>/clk_max_freq_mhz
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Date: Jun 2019
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KernelVersion: not yet upstreamed
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Contact: oded.gabbay@gmail.com
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Description: Allows the user to set the maximum clock frequency, in MHz.
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The device clock might be set to lower value than the maximum.
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The user should read the clk_cur_freq_mhz to see the actual
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frequency value of the device clock. This property is valid
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only for the Gaudi ASIC family
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What: /sys/class/habanalabs/hl<n>/clk_cur_freq_mhz
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Date: Jun 2019
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KernelVersion: not yet upstreamed
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Contact: oded.gabbay@gmail.com
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Description: Displays the current frequency, in MHz, of the device clock.
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This property is valid only for the Gaudi ASIC family
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What: /sys/class/habanalabs/hl<n>/cpld_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Version of the Device's CPLD F/W
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What: /sys/class/habanalabs/hl<n>/cpucp_kernel_ver
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Date: Oct 2020
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KernelVersion: 5.10
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Contact: oded.gabbay@gmail.com
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Description: Version of the Linux kernel running on the device's CPU
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What: /sys/class/habanalabs/hl<n>/cpucp_ver
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Date: Oct 2020
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KernelVersion: 5.10
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Contact: oded.gabbay@gmail.com
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Description: Version of the application running on the device's CPU
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What: /sys/class/habanalabs/hl<n>/device_type
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays the code name of the device according to its type.
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The supported values are: "GOYA"
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What: /sys/class/habanalabs/hl<n>/eeprom
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: A binary file attribute that contains the contents of the
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on-board EEPROM
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What: /sys/class/habanalabs/hl<n>/fuse_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays the device's version from the eFuse
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What: /sys/class/habanalabs/hl<n>/hard_reset
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Interface to trigger a hard-reset operation for the device.
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Hard-reset will reset ALL internal components of the device
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except for the PCI interface and the internal PLLs
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What: /sys/class/habanalabs/hl<n>/hard_reset_cnt
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays how many times the device have undergone a hard-reset
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operation since the driver was loaded
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What: /sys/class/habanalabs/hl<n>/high_pll
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Allows the user to set the maximum clock frequency for MME, TPC
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and IC when the power management profile is set to "automatic".
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This property is valid only for the Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/ic_clk
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Allows the user to set the maximum clock frequency, in Hz, of
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the Interconnect fabric. Writes to this parameter affect the
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device only when the power management profile is set to "manual"
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mode. The device IC clock might be set to lower value than the
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maximum. The user should read the ic_clk_curr to see the actual
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frequency value of the IC. This property is valid only for the
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Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/ic_clk_curr
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays the current clock frequency, in Hz, of the Interconnect
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fabric. This property is valid only for the Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/infineon_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Version of the Device's power supply F/W code
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What: /sys/class/habanalabs/hl<n>/max_power
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Allows the user to set the maximum power consumption of the
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device in milliwatts.
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What: /sys/class/habanalabs/hl<n>/mme_clk
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Allows the user to set the maximum clock frequency, in Hz, of
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the MME compute engine. Writes to this parameter affect the
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device only when the power management profile is set to "manual"
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mode. The device MME clock might be set to lower value than the
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maximum. The user should read the mme_clk_curr to see the actual
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frequency value of the MME. This property is valid only for the
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Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/mme_clk_curr
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays the current clock frequency, in Hz, of the MME compute
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engine. This property is valid only for the Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/pci_addr
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays the PCI address of the device. This is needed so the
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user would be able to open a device based on its PCI address
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What: /sys/class/habanalabs/hl<n>/pm_mng_profile
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Power management profile. Values are "auto", "manual". In "auto"
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mode, the driver will set the maximum clock frequency to a high
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value when a user-space process opens the device's file (unless
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it was already opened by another process). The driver will set
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the max clock frequency to a low value when there are no user
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processes that are opened on the device's file. In "manual"
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mode, the user sets the maximum clock frequency by writing to
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ic_clk, mme_clk and tpc_clk. This property is valid only for
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the Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/preboot_btl_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Version of the device's preboot F/W code
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What: /sys/class/habanalabs/hl<n>/soft_reset
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Interface to trigger a soft-reset operation for the device.
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Soft-reset will reset only the compute and DMA engines of the
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device
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What: /sys/class/habanalabs/hl<n>/soft_reset_cnt
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays how many times the device have undergone a soft-reset
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operation since the driver was loaded
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What: /sys/class/habanalabs/hl<n>/status
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Status of the card: "Operational", "Malfunction", "In reset".
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What: /sys/class/habanalabs/hl<n>/thermal_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Version of the Device's thermal daemon
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What: /sys/class/habanalabs/hl<n>/tpc_clk
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Allows the user to set the maximum clock frequency, in Hz, of
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the TPC compute engines. Writes to this parameter affect the
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device only when the power management profile is set to "manual"
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mode. The device TPC clock might be set to lower value than the
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maximum. The user should read the tpc_clk_curr to see the actual
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frequency value of the TPC. This property is valid only for
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Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/tpc_clk_curr
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Displays the current clock frequency, in Hz, of the TPC compute
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engines. This property is valid only for the Goya ASIC family
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What: /sys/class/habanalabs/hl<n>/uboot_ver
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Date: Jan 2019
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KernelVersion: 5.1
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Contact: oded.gabbay@gmail.com
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Description: Version of the u-boot running on the device's CPU |