131 lines
2.9 KiB
C
131 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 NVIDIA CORPORATION. All rights reserved.
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*/
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#define dev_fmt(fmt) "tegra-soc: " fmt
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/export.h>
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#include <linux/of.h>
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#include <linux/pm_opp.h>
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#include <soc/tegra/common.h>
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#include <soc/tegra/fuse.h>
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static const struct of_device_id tegra_machine_match[] = {
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{ .compatible = "nvidia,tegra20", },
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{ .compatible = "nvidia,tegra30", },
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{ .compatible = "nvidia,tegra114", },
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{ .compatible = "nvidia,tegra124", },
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{ .compatible = "nvidia,tegra132", },
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{ .compatible = "nvidia,tegra210", },
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{ }
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};
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bool soc_is_tegra(void)
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{
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const struct of_device_id *match;
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struct device_node *root;
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root = of_find_node_by_path("/");
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if (!root)
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return false;
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match = of_match_node(tegra_machine_match, root);
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of_node_put(root);
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return match != NULL;
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}
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static int tegra_core_dev_init_opp_state(struct device *dev)
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{
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unsigned long rate;
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struct clk *clk;
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int err;
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clk = devm_clk_get(dev, NULL);
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if (IS_ERR(clk)) {
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dev_err(dev, "failed to get clk: %pe\n", clk);
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return PTR_ERR(clk);
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}
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rate = clk_get_rate(clk);
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if (!rate) {
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dev_err(dev, "failed to get clk rate\n");
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return -EINVAL;
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}
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/* first dummy rate-setting initializes voltage vote */
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err = dev_pm_opp_set_rate(dev, rate);
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if (err) {
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dev_err(dev, "failed to initialize OPP clock: %d\n", err);
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return err;
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}
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return 0;
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}
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/**
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* devm_tegra_core_dev_init_opp_table() - initialize OPP table
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* @dev: device for which OPP table is initialized
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* @params: pointer to the OPP table configuration
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*
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* This function will initialize OPP table and sync OPP state of a Tegra SoC
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* core device.
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*
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* Return: 0 on success or errorno.
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*/
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int devm_tegra_core_dev_init_opp_table(struct device *dev,
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struct tegra_core_opp_params *params)
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{
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u32 hw_version;
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int err;
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err = devm_pm_opp_set_clkname(dev, NULL);
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if (err) {
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dev_err(dev, "failed to set OPP clk: %d\n", err);
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return err;
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}
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/* Tegra114+ doesn't support OPP yet */
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if (!of_machine_is_compatible("nvidia,tegra20") &&
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!of_machine_is_compatible("nvidia,tegra30"))
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return -ENODEV;
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if (of_machine_is_compatible("nvidia,tegra20"))
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hw_version = BIT(tegra_sku_info.soc_process_id);
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else
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hw_version = BIT(tegra_sku_info.soc_speedo_id);
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err = devm_pm_opp_set_supported_hw(dev, &hw_version, 1);
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if (err) {
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dev_err(dev, "failed to set OPP supported HW: %d\n", err);
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return err;
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}
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/*
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* Older device-trees have an empty OPP table, we will get
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* -ENODEV from devm_pm_opp_of_add_table() in this case.
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*/
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err = devm_pm_opp_of_add_table(dev);
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if (err) {
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if (err == -ENODEV)
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dev_err_once(dev, "OPP table not found, please update device-tree\n");
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else
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dev_err(dev, "failed to add OPP table: %d\n", err);
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return err;
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}
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if (params->init_state) {
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err = tegra_core_dev_init_opp_state(dev);
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if (err)
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return err;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(devm_tegra_core_dev_init_opp_table);
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