177 lines
4.7 KiB
C
177 lines
4.7 KiB
C
/*
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* Copyright (c) 2008-2009 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef ANI_H
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#define ANI_H
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#define HAL_PROCESS_ANI 0x00000001
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#define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI))
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#define BEACON_RSSI(ahp) (ahp->stats.avgbrssi)
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/* units are errors per second */
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#define ATH9K_ANI_OFDM_TRIG_HIGH_OLD 500
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#define ATH9K_ANI_OFDM_TRIG_HIGH_NEW 1000
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/* units are errors per second */
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#define ATH9K_ANI_OFDM_TRIG_LOW_OLD 200
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#define ATH9K_ANI_OFDM_TRIG_LOW_NEW 400
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/* units are errors per second */
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#define ATH9K_ANI_CCK_TRIG_HIGH_OLD 200
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#define ATH9K_ANI_CCK_TRIG_HIGH_NEW 600
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/* units are errors per second */
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#define ATH9K_ANI_CCK_TRIG_LOW_OLD 100
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#define ATH9K_ANI_CCK_TRIG_LOW_NEW 300
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#define ATH9K_ANI_NOISE_IMMUNE_LVL 4
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#define ATH9K_ANI_USE_OFDM_WEAK_SIG true
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#define ATH9K_ANI_CCK_WEAK_SIG_THR false
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#define ATH9K_ANI_SPUR_IMMUNE_LVL_OLD 7
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#define ATH9K_ANI_SPUR_IMMUNE_LVL_NEW 3
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#define ATH9K_ANI_FIRSTEP_LVL_OLD 0
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#define ATH9K_ANI_FIRSTEP_LVL_NEW 2
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#define ATH9K_ANI_RSSI_THR_HIGH 40
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#define ATH9K_ANI_RSSI_THR_LOW 7
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#define ATH9K_ANI_PERIOD_OLD 100
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#define ATH9K_ANI_PERIOD_NEW 1000
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/* in ms */
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#define ATH9K_ANI_POLLINTERVAL_OLD 100
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#define ATH9K_ANI_POLLINTERVAL_NEW 1000
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#define HAL_NOISE_IMMUNE_MAX 4
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#define HAL_SPUR_IMMUNE_MAX 7
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#define HAL_FIRST_STEP_MAX 2
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#define ATH9K_SIG_FIRSTEP_SETTING_MIN 0
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#define ATH9K_SIG_FIRSTEP_SETTING_MAX 20
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#define ATH9K_SIG_SPUR_IMM_SETTING_MIN 0
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#define ATH9K_SIG_SPUR_IMM_SETTING_MAX 22
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#define ATH9K_ANI_ENABLE_MRC_CCK true
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/* values here are relative to the INI */
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enum ath9k_ani_cmd {
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ATH9K_ANI_PRESENT = 0x1,
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ATH9K_ANI_NOISE_IMMUNITY_LEVEL = 0x2,
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ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x4,
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ATH9K_ANI_CCK_WEAK_SIGNAL_THR = 0x8,
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ATH9K_ANI_FIRSTEP_LEVEL = 0x10,
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ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x20,
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ATH9K_ANI_MODE = 0x40,
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ATH9K_ANI_PHYERR_RESET = 0x80,
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ATH9K_ANI_MRC_CCK = 0x100,
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ATH9K_ANI_ALL = 0xfff
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};
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struct ath9k_mib_stats {
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u32 ackrcv_bad;
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u32 rts_bad;
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u32 rts_good;
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u32 fcs_bad;
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u32 beacons;
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};
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/* INI default values for ANI registers */
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struct ath9k_ani_default {
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u16 m1ThreshLow;
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u16 m2ThreshLow;
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u16 m1Thresh;
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u16 m2Thresh;
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u16 m2CountThr;
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u16 m2CountThrLow;
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u16 m1ThreshLowExt;
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u16 m2ThreshLowExt;
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u16 m1ThreshExt;
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u16 m2ThreshExt;
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u16 firstep;
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u16 firstepLow;
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u16 cycpwrThr1;
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u16 cycpwrThr1Ext;
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};
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struct ar5416AniState {
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struct ath9k_channel *c;
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u8 noiseImmunityLevel;
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u8 ofdmNoiseImmunityLevel;
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u8 cckNoiseImmunityLevel;
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bool ofdmsTurn;
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u8 mrcCCKOff;
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u8 spurImmunityLevel;
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u8 firstepLevel;
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u8 ofdmWeakSigDetectOff;
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u8 cckWeakSigThreshold;
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u32 listenTime;
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u32 ofdmTrigHigh;
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u32 ofdmTrigLow;
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int32_t cckTrigHigh;
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int32_t cckTrigLow;
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int32_t rssiThrLow;
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int32_t rssiThrHigh;
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u32 noiseFloor;
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u32 txFrameCount;
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u32 rxFrameCount;
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u32 cycleCount;
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u32 ofdmPhyErrCount;
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u32 cckPhyErrCount;
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u32 ofdmPhyErrBase;
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u32 cckPhyErrBase;
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int16_t pktRssi[2];
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int16_t ofdmErrRssi[2];
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int16_t cckErrRssi[2];
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struct ath9k_ani_default iniDef;
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};
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struct ar5416Stats {
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u32 ast_ani_niup;
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u32 ast_ani_nidown;
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u32 ast_ani_spurup;
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u32 ast_ani_spurdown;
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u32 ast_ani_ofdmon;
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u32 ast_ani_ofdmoff;
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u32 ast_ani_cckhigh;
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u32 ast_ani_ccklow;
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u32 ast_ani_stepup;
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u32 ast_ani_stepdown;
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u32 ast_ani_ofdmerrs;
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u32 ast_ani_cckerrs;
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u32 ast_ani_reset;
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u32 ast_ani_lzero;
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u32 ast_ani_lneg;
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u32 avgbrssi;
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struct ath9k_mib_stats ast_mibstats;
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};
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#define ah_mibStats stats.ast_mibstats
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void ath9k_enable_mib_counters(struct ath_hw *ah);
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void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
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u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah, u32 *rxc_pcnt,
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u32 *rxf_pcnt, u32 *txf_pcnt);
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void ath9k_hw_ani_setup(struct ath_hw *ah);
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void ath9k_hw_ani_init(struct ath_hw *ah);
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int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
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struct ath9k_channel *chan);
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#endif /* ANI_H */
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