136 lines
3.3 KiB
C
136 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Qualcomm APCS clock controller driver
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*
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* Copyright (c) 2017, Linaro Limited
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* Author: Georgi Djakov <georgi.djakov@linaro.org>
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "clk-regmap.h"
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#include "clk-regmap-mux-div.h"
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static const u32 gpll0_a53cc_map[] = { 4, 5 };
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static const char * const gpll0_a53cc[] = {
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"gpll0_vote",
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"a53pll",
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};
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/*
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* We use the notifier function for switching to a temporary safe configuration
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* (mux and divider), while the A53 PLL is reconfigured.
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*/
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static int a53cc_notifier_cb(struct notifier_block *nb, unsigned long event,
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void *data)
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{
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int ret = 0;
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struct clk_regmap_mux_div *md = container_of(nb,
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struct clk_regmap_mux_div,
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clk_nb);
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if (event == PRE_RATE_CHANGE)
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/* set the mux and divider to safe frequency (400mhz) */
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ret = mux_div_set_src_div(md, 4, 3);
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return notifier_from_errno(ret);
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}
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static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device *parent = dev->parent;
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struct clk_regmap_mux_div *a53cc;
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struct regmap *regmap;
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struct clk_init_data init = { };
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int ret = -ENODEV;
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regmap = dev_get_regmap(parent, NULL);
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if (!regmap) {
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dev_err(dev, "failed to get regmap: %d\n", ret);
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return ret;
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}
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a53cc = devm_kzalloc(dev, sizeof(*a53cc), GFP_KERNEL);
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if (!a53cc)
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return -ENOMEM;
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init.name = "a53mux";
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init.parent_names = gpll0_a53cc;
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init.num_parents = ARRAY_SIZE(gpll0_a53cc);
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init.ops = &clk_regmap_mux_div_ops;
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init.flags = CLK_SET_RATE_PARENT;
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a53cc->clkr.hw.init = &init;
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a53cc->clkr.regmap = regmap;
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a53cc->reg_offset = 0x50;
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a53cc->hid_width = 5;
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a53cc->hid_shift = 0;
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a53cc->src_width = 3;
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a53cc->src_shift = 8;
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a53cc->parent_map = gpll0_a53cc_map;
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a53cc->pclk = devm_clk_get(parent, NULL);
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if (IS_ERR(a53cc->pclk)) {
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ret = PTR_ERR(a53cc->pclk);
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dev_err(dev, "failed to get clk: %d\n", ret);
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return ret;
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}
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a53cc->clk_nb.notifier_call = a53cc_notifier_cb;
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ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb);
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if (ret) {
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dev_err(dev, "failed to register clock notifier: %d\n", ret);
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return ret;
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}
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ret = devm_clk_register_regmap(dev, &a53cc->clkr);
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if (ret) {
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dev_err(dev, "failed to register regmap clock: %d\n", ret);
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goto err;
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}
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ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
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&a53cc->clkr.hw);
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if (ret) {
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dev_err(dev, "failed to add clock provider: %d\n", ret);
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goto err;
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}
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platform_set_drvdata(pdev, a53cc);
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return 0;
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err:
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clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
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return ret;
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}
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static int qcom_apcs_msm8916_clk_remove(struct platform_device *pdev)
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{
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struct clk_regmap_mux_div *a53cc = platform_get_drvdata(pdev);
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clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
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return 0;
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}
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static struct platform_driver qcom_apcs_msm8916_clk_driver = {
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.probe = qcom_apcs_msm8916_clk_probe,
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.remove = qcom_apcs_msm8916_clk_remove,
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.driver = {
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.name = "qcom-apcs-msm8916-clk",
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},
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};
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module_platform_driver(qcom_apcs_msm8916_clk_driver);
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MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Qualcomm MSM8916 APCS clock driver");
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