759 lines
19 KiB
C
759 lines
19 KiB
C
/*
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* Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com>
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* Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
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*
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* Derived from the PCAN project file driver/src/pcan_pci.c:
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*
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* Copyright (C) 2001-2006 PEAK System-Technik GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the version 2 of the GNU General Public License
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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#include <linux/can.h>
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#include <linux/can/dev.h>
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#include "sja1000.h"
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MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
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MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
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MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards");
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MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards");
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MODULE_LICENSE("GPL v2");
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#define DRV_NAME "peak_pci"
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struct peak_pciec_card;
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struct peak_pci_chan {
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void __iomem *cfg_base; /* Common for all channels */
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struct net_device *prev_dev; /* Chain of network devices */
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u16 icr_mask; /* Interrupt mask for fast ack */
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struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */
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};
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#define PEAK_PCI_CAN_CLOCK (16000000 / 2)
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#define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
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#define PEAK_PCI_OCR OCR_TX0_PUSHPULL
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/*
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* Important PITA registers
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*/
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#define PITA_ICR 0x00 /* Interrupt control register */
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#define PITA_GPIOICR 0x18 /* GPIO interface control register */
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#define PITA_MISC 0x1C /* Miscellaneous register */
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#define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */
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#define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */
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#define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */
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#define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */
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#define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */
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#define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */
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#define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */
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#define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */
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#define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */
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#define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */
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#define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */
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#define PEAK_PCI_CHAN_MAX 4
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static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = {
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0x02, 0x01, 0x40, 0x80
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};
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static DEFINE_PCI_DEVICE_TABLE(peak_pci_tbl) = {
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{PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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{PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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{PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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{PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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{PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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{PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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{PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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#ifdef CONFIG_CAN_PEAK_PCIEC
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{PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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#endif
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{0,}
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};
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MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
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#ifdef CONFIG_CAN_PEAK_PCIEC
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/*
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* PCAN-ExpressCard needs I2C bit-banging configuration option.
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*/
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/* GPIOICR byte access offsets */
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#define PITA_GPOUT 0x18 /* GPx output value */
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#define PITA_GPIN 0x19 /* GPx input value */
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#define PITA_GPOEN 0x1A /* configure GPx as ouput pin */
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/* I2C GP bits */
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#define PITA_GPIN_SCL 0x01 /* Serial Clock Line */
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#define PITA_GPIN_SDA 0x04 /* Serial DAta line */
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#define PCA9553_1_SLAVEADDR (0xC4 >> 1)
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/* PCA9553 LS0 fields values */
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enum {
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PCA9553_LOW,
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PCA9553_HIGHZ,
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PCA9553_PWM0,
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PCA9553_PWM1
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};
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/* LEDs control */
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#define PCA9553_ON PCA9553_LOW
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#define PCA9553_OFF PCA9553_HIGHZ
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#define PCA9553_SLOW PCA9553_PWM0
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#define PCA9553_FAST PCA9553_PWM1
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#define PCA9553_LED(c) (1 << (c))
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#define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1))
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#define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c)
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#define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c)
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#define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c)
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#define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c)
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#define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c)
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#define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1))
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#define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */
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struct peak_pciec_chan {
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struct net_device *netdev;
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unsigned long prev_rx_bytes;
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unsigned long prev_tx_bytes;
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};
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struct peak_pciec_card {
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void __iomem *cfg_base; /* Common for all channels */
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void __iomem *reg_base; /* first channel base address */
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u8 led_cache; /* leds state cache */
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/* PCIExpressCard i2c data */
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struct i2c_algo_bit_data i2c_bit;
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struct i2c_adapter led_chip;
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struct delayed_work led_work; /* led delayed work */
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int chan_count;
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struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX];
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};
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/* "normal" pci register write callback is overloaded for leds control */
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static void peak_pci_write_reg(const struct sja1000_priv *priv,
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int port, u8 val);
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static inline void pita_set_scl_highz(struct peak_pciec_card *card)
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{
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u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL;
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writeb(gp_outen, card->cfg_base + PITA_GPOEN);
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}
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static inline void pita_set_sda_highz(struct peak_pciec_card *card)
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{
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u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA;
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writeb(gp_outen, card->cfg_base + PITA_GPOEN);
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}
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static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card)
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{
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/* raise SCL & SDA GPIOs to high-Z */
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pita_set_scl_highz(card);
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pita_set_sda_highz(card);
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}
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static void pita_setsda(void *data, int state)
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{
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struct peak_pciec_card *card = (struct peak_pciec_card *)data;
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u8 gp_out, gp_outen;
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/* set output sda always to 0 */
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gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA;
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writeb(gp_out, card->cfg_base + PITA_GPOUT);
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/* control output sda with GPOEN */
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gp_outen = readb(card->cfg_base + PITA_GPOEN);
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if (state)
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gp_outen &= ~PITA_GPIN_SDA;
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else
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gp_outen |= PITA_GPIN_SDA;
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writeb(gp_outen, card->cfg_base + PITA_GPOEN);
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}
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static void pita_setscl(void *data, int state)
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{
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struct peak_pciec_card *card = (struct peak_pciec_card *)data;
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u8 gp_out, gp_outen;
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/* set output scl always to 0 */
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gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL;
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writeb(gp_out, card->cfg_base + PITA_GPOUT);
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/* control output scl with GPOEN */
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gp_outen = readb(card->cfg_base + PITA_GPOEN);
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if (state)
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gp_outen &= ~PITA_GPIN_SCL;
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else
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gp_outen |= PITA_GPIN_SCL;
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writeb(gp_outen, card->cfg_base + PITA_GPOEN);
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}
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static int pita_getsda(void *data)
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{
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struct peak_pciec_card *card = (struct peak_pciec_card *)data;
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/* set tristate */
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pita_set_sda_highz(card);
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return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0;
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}
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static int pita_getscl(void *data)
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{
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struct peak_pciec_card *card = (struct peak_pciec_card *)data;
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/* set tristate */
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pita_set_scl_highz(card);
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return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0;
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}
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/*
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* write commands to the LED chip though the I2C-bus of the PCAN-PCIeC
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*/
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static int peak_pciec_write_pca9553(struct peak_pciec_card *card,
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u8 offset, u8 data)
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{
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u8 buffer[2] = {
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offset,
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data
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};
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struct i2c_msg msg = {
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.addr = PCA9553_1_SLAVEADDR,
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.len = 2,
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.buf = buffer,
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};
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int ret;
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/* cache led mask */
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if ((offset == 5) && (data == card->led_cache))
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return 0;
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ret = i2c_transfer(&card->led_chip, &msg, 1);
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if (ret < 0)
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return ret;
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if (offset == 5)
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card->led_cache = data;
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return 0;
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}
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/*
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* delayed work callback used to control the LEDs
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*/
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static void peak_pciec_led_work(struct work_struct *work)
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{
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struct peak_pciec_card *card =
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container_of(work, struct peak_pciec_card, led_work.work);
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struct net_device *netdev;
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u8 new_led = card->led_cache;
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int i, up_count = 0;
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/* first check what is to do */
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for (i = 0; i < card->chan_count; i++) {
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/* default is: not configured */
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new_led &= ~PCA9553_LED_MASK(i);
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new_led |= PCA9553_LED_ON(i);
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netdev = card->channel[i].netdev;
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if (!netdev || !(netdev->flags & IFF_UP))
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continue;
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up_count++;
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/* no activity (but configured) */
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new_led &= ~PCA9553_LED_MASK(i);
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new_led |= PCA9553_LED_SLOW(i);
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/* if bytes counters changed, set fast blinking led */
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if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) {
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card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes;
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new_led &= ~PCA9553_LED_MASK(i);
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new_led |= PCA9553_LED_FAST(i);
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}
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if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) {
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card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes;
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new_led &= ~PCA9553_LED_MASK(i);
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new_led |= PCA9553_LED_FAST(i);
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}
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}
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/* check if LS0 settings changed, only update i2c if so */
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peak_pciec_write_pca9553(card, 5, new_led);
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/* restart timer (except if no more configured channels) */
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if (up_count)
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schedule_delayed_work(&card->led_work, HZ);
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}
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/*
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* set LEDs blinking state
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*/
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static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)
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{
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u8 new_led = card->led_cache;
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int i;
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/* first check what is to do */
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for (i = 0; i < card->chan_count; i++)
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if (led_mask & PCA9553_LED(i)) {
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new_led &= ~PCA9553_LED_MASK(i);
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new_led |= PCA9553_LED_STATE(s, i);
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}
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/* check if LS0 settings changed, only update i2c if so */
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peak_pciec_write_pca9553(card, 5, new_led);
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}
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/*
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* start one second delayed work to control LEDs
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*/
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static void peak_pciec_start_led_work(struct peak_pciec_card *card)
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{
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schedule_delayed_work(&card->led_work, HZ);
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}
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/*
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* stop LEDs delayed work
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*/
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static void peak_pciec_stop_led_work(struct peak_pciec_card *card)
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{
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cancel_delayed_work_sync(&card->led_work);
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}
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/*
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* initialize the PCA9553 4-bit I2C-bus LED chip
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*/
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static int peak_pciec_init_leds(struct peak_pciec_card *card)
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{
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int err;
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/* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */
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err = peak_pciec_write_pca9553(card, 1, 44 / 1);
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if (err)
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return err;
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/* duty cycle 0: 50% */
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err = peak_pciec_write_pca9553(card, 2, 0x80);
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if (err)
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return err;
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/* prescaler for frequency 1: "FAST" = 5 Hz */
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err = peak_pciec_write_pca9553(card, 3, 44 / 5);
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if (err)
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return err;
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/* duty cycle 1: 50% */
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err = peak_pciec_write_pca9553(card, 4, 0x80);
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if (err)
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return err;
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/* switch LEDs to initial state */
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return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT);
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}
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/*
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* restore LEDs state to off peak_pciec_leds_exit
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*/
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static void peak_pciec_leds_exit(struct peak_pciec_card *card)
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{
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/* switch LEDs to off */
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peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL);
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}
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/*
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* normal write sja1000 register method overloaded to catch when controller
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* is started or stopped, to control leds
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*/
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static void peak_pciec_write_reg(const struct sja1000_priv *priv,
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int port, u8 val)
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{
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struct peak_pci_chan *chan = priv->priv;
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struct peak_pciec_card *card = chan->pciec_card;
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int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE;
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/* sja1000 register changes control the leds state */
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if (port == SJA1000_MOD)
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switch (val) {
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case MOD_RM:
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/* Reset Mode: set led on */
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peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON);
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break;
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case 0x00:
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/* Normal Mode: led slow blinking and start led timer */
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peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW);
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peak_pciec_start_led_work(card);
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break;
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default:
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break;
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}
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/* call base function */
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peak_pci_write_reg(priv, port, val);
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}
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static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {
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.setsda = pita_setsda,
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.setscl = pita_setscl,
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.getsda = pita_getsda,
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.getscl = pita_getscl,
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.udelay = 10,
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.timeout = HZ,
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};
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static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
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{
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struct sja1000_priv *priv = netdev_priv(dev);
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struct peak_pci_chan *chan = priv->priv;
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struct peak_pciec_card *card;
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int err;
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/* copy i2c object address from 1st channel */
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if (chan->prev_dev) {
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struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev);
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struct peak_pci_chan *prev_chan = prev_priv->priv;
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card = prev_chan->pciec_card;
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if (!card)
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return -ENODEV;
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/* channel is the first one: do the init part */
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} else {
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/* create the bit banging I2C adapter structure */
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card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL);
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if (!card)
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return -ENOMEM;
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card->cfg_base = chan->cfg_base;
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card->reg_base = priv->reg_base;
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card->led_chip.owner = THIS_MODULE;
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card->led_chip.dev.parent = &pdev->dev;
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card->led_chip.algo_data = &card->i2c_bit;
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strncpy(card->led_chip.name, "peak_i2c",
|
|
sizeof(card->led_chip.name));
|
|
|
|
card->i2c_bit = peak_pciec_i2c_bit_ops;
|
|
card->i2c_bit.udelay = 10;
|
|
card->i2c_bit.timeout = HZ;
|
|
card->i2c_bit.data = card;
|
|
|
|
peak_pciec_init_pita_gpio(card);
|
|
|
|
err = i2c_bit_add_bus(&card->led_chip);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "i2c init failed\n");
|
|
goto pciec_init_err_1;
|
|
}
|
|
|
|
err = peak_pciec_init_leds(card);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "leds hardware init failed\n");
|
|
goto pciec_init_err_2;
|
|
}
|
|
|
|
INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work);
|
|
/* PCAN-ExpressCard needs its own callback for leds */
|
|
priv->write_reg = peak_pciec_write_reg;
|
|
}
|
|
|
|
chan->pciec_card = card;
|
|
card->channel[card->chan_count++].netdev = dev;
|
|
|
|
return 0;
|
|
|
|
pciec_init_err_2:
|
|
i2c_del_adapter(&card->led_chip);
|
|
|
|
pciec_init_err_1:
|
|
peak_pciec_init_pita_gpio(card);
|
|
kfree(card);
|
|
|
|
return err;
|
|
}
|
|
|
|
static void peak_pciec_remove(struct peak_pciec_card *card)
|
|
{
|
|
peak_pciec_stop_led_work(card);
|
|
peak_pciec_leds_exit(card);
|
|
i2c_del_adapter(&card->led_chip);
|
|
peak_pciec_init_pita_gpio(card);
|
|
kfree(card);
|
|
}
|
|
|
|
#else /* CONFIG_CAN_PEAK_PCIEC */
|
|
|
|
/*
|
|
* Placebo functions when PCAN-ExpressCard support is not selected
|
|
*/
|
|
static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static inline void peak_pciec_remove(struct peak_pciec_card *card)
|
|
{
|
|
}
|
|
#endif /* CONFIG_CAN_PEAK_PCIEC */
|
|
|
|
static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port)
|
|
{
|
|
return readb(priv->reg_base + (port << 2));
|
|
}
|
|
|
|
static void peak_pci_write_reg(const struct sja1000_priv *priv,
|
|
int port, u8 val)
|
|
{
|
|
writeb(val, priv->reg_base + (port << 2));
|
|
}
|
|
|
|
static void peak_pci_post_irq(const struct sja1000_priv *priv)
|
|
{
|
|
struct peak_pci_chan *chan = priv->priv;
|
|
u16 icr;
|
|
|
|
/* Select and clear in PITA stored interrupt */
|
|
icr = readw(chan->cfg_base + PITA_ICR);
|
|
if (icr & chan->icr_mask)
|
|
writew(chan->icr_mask, chan->cfg_base + PITA_ICR);
|
|
}
|
|
|
|
static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|
{
|
|
struct sja1000_priv *priv;
|
|
struct peak_pci_chan *chan;
|
|
struct net_device *dev;
|
|
void __iomem *cfg_base, *reg_base;
|
|
u16 sub_sys_id, icr;
|
|
int i, err, channels;
|
|
|
|
err = pci_enable_device(pdev);
|
|
if (err)
|
|
return err;
|
|
|
|
err = pci_request_regions(pdev, DRV_NAME);
|
|
if (err)
|
|
goto failure_disable_pci;
|
|
|
|
err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
|
|
if (err)
|
|
goto failure_release_regions;
|
|
|
|
dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
|
|
pdev->vendor, pdev->device, sub_sys_id);
|
|
|
|
err = pci_write_config_word(pdev, 0x44, 0);
|
|
if (err)
|
|
goto failure_release_regions;
|
|
|
|
if (sub_sys_id >= 12)
|
|
channels = 4;
|
|
else if (sub_sys_id >= 10)
|
|
channels = 3;
|
|
else if (sub_sys_id >= 4)
|
|
channels = 2;
|
|
else
|
|
channels = 1;
|
|
|
|
cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
|
|
if (!cfg_base) {
|
|
dev_err(&pdev->dev, "failed to map PCI resource #0\n");
|
|
err = -ENOMEM;
|
|
goto failure_release_regions;
|
|
}
|
|
|
|
reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
|
|
if (!reg_base) {
|
|
dev_err(&pdev->dev, "failed to map PCI resource #1\n");
|
|
err = -ENOMEM;
|
|
goto failure_unmap_cfg_base;
|
|
}
|
|
|
|
/* Set GPIO control register */
|
|
writew(0x0005, cfg_base + PITA_GPIOICR + 2);
|
|
/* Enable all channels of this card */
|
|
writeb(0x00, cfg_base + PITA_GPIOICR);
|
|
/* Toggle reset */
|
|
writeb(0x05, cfg_base + PITA_MISC + 3);
|
|
mdelay(5);
|
|
/* Leave parport mux mode */
|
|
writeb(0x04, cfg_base + PITA_MISC + 3);
|
|
|
|
icr = readw(cfg_base + PITA_ICR + 2);
|
|
|
|
for (i = 0; i < channels; i++) {
|
|
dev = alloc_sja1000dev(sizeof(struct peak_pci_chan));
|
|
if (!dev) {
|
|
err = -ENOMEM;
|
|
goto failure_remove_channels;
|
|
}
|
|
|
|
priv = netdev_priv(dev);
|
|
chan = priv->priv;
|
|
|
|
chan->cfg_base = cfg_base;
|
|
priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE;
|
|
|
|
priv->read_reg = peak_pci_read_reg;
|
|
priv->write_reg = peak_pci_write_reg;
|
|
priv->post_irq = peak_pci_post_irq;
|
|
|
|
priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;
|
|
priv->ocr = PEAK_PCI_OCR;
|
|
priv->cdr = PEAK_PCI_CDR;
|
|
/* Neither a slave nor a single device distributes the clock */
|
|
if (channels == 1 || i > 0)
|
|
priv->cdr |= CDR_CLK_OFF;
|
|
|
|
/* Setup interrupt handling */
|
|
priv->irq_flags = IRQF_SHARED;
|
|
dev->irq = pdev->irq;
|
|
|
|
chan->icr_mask = peak_pci_icr_masks[i];
|
|
icr |= chan->icr_mask;
|
|
|
|
SET_NETDEV_DEV(dev, &pdev->dev);
|
|
|
|
/* Create chain of SJA1000 devices */
|
|
chan->prev_dev = pci_get_drvdata(pdev);
|
|
pci_set_drvdata(pdev, dev);
|
|
|
|
/*
|
|
* PCAN-ExpressCard needs some additional i2c init.
|
|
* This must be done *before* register_sja1000dev() but
|
|
* *after* devices linkage
|
|
*/
|
|
if (pdev->device == PEAK_PCIEC_DEVICE_ID) {
|
|
err = peak_pciec_probe(pdev, dev);
|
|
if (err) {
|
|
dev_err(&pdev->dev,
|
|
"failed to probe device (err %d)\n",
|
|
err);
|
|
goto failure_free_dev;
|
|
}
|
|
}
|
|
|
|
err = register_sja1000dev(dev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "failed to register device\n");
|
|
goto failure_free_dev;
|
|
}
|
|
|
|
dev_info(&pdev->dev,
|
|
"%s at reg_base=0x%p cfg_base=0x%p irq=%d\n",
|
|
dev->name, priv->reg_base, chan->cfg_base, dev->irq);
|
|
}
|
|
|
|
/* Enable interrupts */
|
|
writew(icr, cfg_base + PITA_ICR + 2);
|
|
|
|
return 0;
|
|
|
|
failure_free_dev:
|
|
pci_set_drvdata(pdev, chan->prev_dev);
|
|
free_sja1000dev(dev);
|
|
|
|
failure_remove_channels:
|
|
/* Disable interrupts */
|
|
writew(0x0, cfg_base + PITA_ICR + 2);
|
|
|
|
chan = NULL;
|
|
for (dev = pci_get_drvdata(pdev); dev; dev = chan->prev_dev) {
|
|
unregister_sja1000dev(dev);
|
|
free_sja1000dev(dev);
|
|
priv = netdev_priv(dev);
|
|
chan = priv->priv;
|
|
}
|
|
|
|
/* free any PCIeC resources too */
|
|
if (chan && chan->pciec_card)
|
|
peak_pciec_remove(chan->pciec_card);
|
|
|
|
pci_iounmap(pdev, reg_base);
|
|
|
|
failure_unmap_cfg_base:
|
|
pci_iounmap(pdev, cfg_base);
|
|
|
|
failure_release_regions:
|
|
pci_release_regions(pdev);
|
|
|
|
failure_disable_pci:
|
|
pci_disable_device(pdev);
|
|
|
|
return err;
|
|
}
|
|
|
|
static void peak_pci_remove(struct pci_dev *pdev)
|
|
{
|
|
struct net_device *dev = pci_get_drvdata(pdev); /* Last device */
|
|
struct sja1000_priv *priv = netdev_priv(dev);
|
|
struct peak_pci_chan *chan = priv->priv;
|
|
void __iomem *cfg_base = chan->cfg_base;
|
|
void __iomem *reg_base = priv->reg_base;
|
|
|
|
/* Disable interrupts */
|
|
writew(0x0, cfg_base + PITA_ICR + 2);
|
|
|
|
/* Loop over all registered devices */
|
|
while (1) {
|
|
dev_info(&pdev->dev, "removing device %s\n", dev->name);
|
|
unregister_sja1000dev(dev);
|
|
free_sja1000dev(dev);
|
|
dev = chan->prev_dev;
|
|
|
|
if (!dev) {
|
|
/* do that only for first channel */
|
|
if (chan->pciec_card)
|
|
peak_pciec_remove(chan->pciec_card);
|
|
break;
|
|
}
|
|
priv = netdev_priv(dev);
|
|
chan = priv->priv;
|
|
}
|
|
|
|
pci_iounmap(pdev, reg_base);
|
|
pci_iounmap(pdev, cfg_base);
|
|
pci_release_regions(pdev);
|
|
pci_disable_device(pdev);
|
|
|
|
pci_set_drvdata(pdev, NULL);
|
|
}
|
|
|
|
static struct pci_driver peak_pci_driver = {
|
|
.name = DRV_NAME,
|
|
.id_table = peak_pci_tbl,
|
|
.probe = peak_pci_probe,
|
|
.remove = peak_pci_remove,
|
|
};
|
|
|
|
module_pci_driver(peak_pci_driver);
|