271 lines
6.6 KiB
C
271 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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// Copyright (c) 2016-2017 Hisilicon Limited.
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#include <linux/etherdevice.h>
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#include <linux/kernel.h>
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#include <linux/marvell_phy.h>
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#include "hclge_cmd.h"
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#include "hclge_main.h"
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#include "hclge_mdio.h"
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enum hclge_mdio_c22_op_seq {
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HCLGE_MDIO_C22_WRITE = 1,
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HCLGE_MDIO_C22_READ = 2
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};
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#define HCLGE_MDIO_CTRL_START_B 0
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#define HCLGE_MDIO_CTRL_ST_S 1
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#define HCLGE_MDIO_CTRL_ST_M (0x3 << HCLGE_MDIO_CTRL_ST_S)
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#define HCLGE_MDIO_CTRL_OP_S 3
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#define HCLGE_MDIO_CTRL_OP_M (0x3 << HCLGE_MDIO_CTRL_OP_S)
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#define HCLGE_MDIO_PHYID_S 0
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#define HCLGE_MDIO_PHYID_M (0x1f << HCLGE_MDIO_PHYID_S)
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#define HCLGE_MDIO_PHYREG_S 0
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#define HCLGE_MDIO_PHYREG_M (0x1f << HCLGE_MDIO_PHYREG_S)
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#define HCLGE_MDIO_STA_B 0
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struct hclge_mdio_cfg_cmd {
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u8 ctrl_bit;
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u8 phyid;
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u8 phyad;
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u8 rsvd;
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__le16 reserve;
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__le16 data_wr;
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__le16 data_rd;
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__le16 sta;
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};
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static int hclge_mdio_write(struct mii_bus *bus, int phyid, int regnum,
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u16 data)
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{
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struct hclge_mdio_cfg_cmd *mdio_cmd;
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struct hclge_dev *hdev = bus->priv;
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struct hclge_desc desc;
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int ret;
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if (test_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state))
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return 0;
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hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_MDIO_CONFIG, false);
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mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
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hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M,
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HCLGE_MDIO_PHYID_S, (u32)phyid);
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hnae3_set_field(mdio_cmd->phyad, HCLGE_MDIO_PHYREG_M,
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HCLGE_MDIO_PHYREG_S, (u32)regnum);
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hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1);
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hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M,
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HCLGE_MDIO_CTRL_ST_S, 1);
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hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M,
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HCLGE_MDIO_CTRL_OP_S, HCLGE_MDIO_C22_WRITE);
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mdio_cmd->data_wr = cpu_to_le16(data);
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ret = hclge_cmd_send(&hdev->hw, &desc, 1);
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if (ret) {
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dev_err(&hdev->pdev->dev,
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"mdio write fail when sending cmd, status is %d.\n",
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ret);
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return ret;
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}
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return 0;
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}
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static int hclge_mdio_read(struct mii_bus *bus, int phyid, int regnum)
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{
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struct hclge_mdio_cfg_cmd *mdio_cmd;
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struct hclge_dev *hdev = bus->priv;
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struct hclge_desc desc;
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int ret;
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if (test_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state))
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return 0;
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hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_MDIO_CONFIG, true);
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mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
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hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M,
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HCLGE_MDIO_PHYID_S, (u32)phyid);
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hnae3_set_field(mdio_cmd->phyad, HCLGE_MDIO_PHYREG_M,
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HCLGE_MDIO_PHYREG_S, (u32)regnum);
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hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1);
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hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M,
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HCLGE_MDIO_CTRL_ST_S, 1);
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hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M,
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HCLGE_MDIO_CTRL_OP_S, HCLGE_MDIO_C22_READ);
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/* Read out phy data */
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ret = hclge_cmd_send(&hdev->hw, &desc, 1);
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if (ret) {
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dev_err(&hdev->pdev->dev,
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"mdio read fail when get data, status is %d.\n",
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ret);
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return ret;
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}
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if (hnae3_get_bit(le16_to_cpu(mdio_cmd->sta), HCLGE_MDIO_STA_B)) {
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dev_err(&hdev->pdev->dev, "mdio read data error\n");
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return -EIO;
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}
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return le16_to_cpu(mdio_cmd->data_rd);
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}
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int hclge_mac_mdio_config(struct hclge_dev *hdev)
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{
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#define PHY_INEXISTENT 255
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struct hclge_mac *mac = &hdev->hw.mac;
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struct phy_device *phydev;
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struct mii_bus *mdio_bus;
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int ret;
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if (hdev->hw.mac.phy_addr == PHY_INEXISTENT) {
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dev_info(&hdev->pdev->dev,
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"no phy device is connected to mdio bus\n");
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return 0;
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} else if (hdev->hw.mac.phy_addr >= PHY_MAX_ADDR) {
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dev_err(&hdev->pdev->dev, "phy_addr(%u) is too large.\n",
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hdev->hw.mac.phy_addr);
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return -EINVAL;
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}
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mdio_bus = devm_mdiobus_alloc(&hdev->pdev->dev);
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if (!mdio_bus)
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return -ENOMEM;
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mdio_bus->name = "hisilicon MII bus";
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mdio_bus->read = hclge_mdio_read;
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mdio_bus->write = hclge_mdio_write;
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snprintf(mdio_bus->id, MII_BUS_ID_SIZE, "%s-%s", "mii",
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dev_name(&hdev->pdev->dev));
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mdio_bus->parent = &hdev->pdev->dev;
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mdio_bus->priv = hdev;
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mdio_bus->phy_mask = ~(1 << mac->phy_addr);
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ret = mdiobus_register(mdio_bus);
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if (ret) {
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dev_err(mdio_bus->parent,
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"Failed to register MDIO bus ret = %#x\n", ret);
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return ret;
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}
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phydev = mdiobus_get_phy(mdio_bus, mac->phy_addr);
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if (!phydev) {
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dev_err(mdio_bus->parent, "Failed to get phy device\n");
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mdiobus_unregister(mdio_bus);
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return -EIO;
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}
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mac->phydev = phydev;
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mac->mdio_bus = mdio_bus;
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return 0;
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}
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static void hclge_mac_adjust_link(struct net_device *netdev)
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{
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struct hnae3_handle *h = *((void **)netdev_priv(netdev));
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struct hclge_vport *vport = hclge_get_vport(h);
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struct hclge_dev *hdev = vport->back;
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int duplex, speed;
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int ret;
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/* When phy link down, do nothing */
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if (netdev->phydev->link == 0)
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return;
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speed = netdev->phydev->speed;
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duplex = netdev->phydev->duplex;
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ret = hclge_cfg_mac_speed_dup(hdev, speed, duplex);
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if (ret)
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netdev_err(netdev, "failed to adjust link.\n");
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ret = hclge_cfg_flowctrl(hdev);
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if (ret)
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netdev_err(netdev, "failed to configure flow control.\n");
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}
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int hclge_mac_connect_phy(struct hnae3_handle *handle)
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{
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struct hclge_vport *vport = hclge_get_vport(handle);
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struct hclge_dev *hdev = vport->back;
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struct net_device *netdev = hdev->vport[0].nic.netdev;
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struct phy_device *phydev = hdev->hw.mac.phydev;
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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int ret;
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if (!phydev)
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return 0;
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linkmode_clear_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
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phydev->dev_flags |= MARVELL_PHY_LED0_LINK_LED1_ACTIVE;
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ret = phy_connect_direct(netdev, phydev,
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hclge_mac_adjust_link,
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PHY_INTERFACE_MODE_SGMII);
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if (ret) {
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netdev_err(netdev, "phy_connect_direct err.\n");
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return ret;
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}
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linkmode_copy(mask, hdev->hw.mac.supported);
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linkmode_and(phydev->supported, phydev->supported, mask);
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linkmode_copy(phydev->advertising, phydev->supported);
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/* supported flag is Pause and Asym Pause, but default advertising
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* should be rx on, tx on, so need clear Asym Pause in advertising
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* flag
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*/
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linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
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phydev->advertising);
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phy_attached_info(phydev);
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return 0;
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}
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void hclge_mac_disconnect_phy(struct hnae3_handle *handle)
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{
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struct hclge_vport *vport = hclge_get_vport(handle);
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struct hclge_dev *hdev = vport->back;
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struct phy_device *phydev = hdev->hw.mac.phydev;
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if (!phydev)
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return;
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phy_disconnect(phydev);
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}
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void hclge_mac_start_phy(struct hclge_dev *hdev)
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{
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struct phy_device *phydev = hdev->hw.mac.phydev;
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if (!phydev)
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return;
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phy_start(phydev);
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}
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void hclge_mac_stop_phy(struct hclge_dev *hdev)
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{
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struct net_device *netdev = hdev->vport[0].nic.netdev;
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struct phy_device *phydev = netdev->phydev;
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if (!phydev)
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return;
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phy_stop(phydev);
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}
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