253 lines
6.2 KiB
C
253 lines
6.2 KiB
C
/*
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* include/asm-xtensa/system.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_SYSTEM_H
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#define _XTENSA_SYSTEM_H
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#include <linux/config.h>
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#include <linux/stringify.h>
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#include <asm/processor.h>
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/* interrupt control */
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#define local_save_flags(x) \
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__asm__ __volatile__ ("rsr %0,"__stringify(PS) : "=a" (x));
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#define local_irq_restore(x) do { \
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__asm__ __volatile__ ("wsr %0, "__stringify(PS)" ; rsync" \
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:: "a" (x) : "memory"); } while(0);
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#define local_irq_save(x) do { \
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__asm__ __volatile__ ("rsil %0, "__stringify(LOCKLEVEL) \
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: "=a" (x) :: "memory");} while(0);
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static inline void local_irq_disable(void)
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{
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unsigned long flags;
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__asm__ __volatile__ ("rsil %0, "__stringify(LOCKLEVEL)
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: "=a" (flags) :: "memory");
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}
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static inline void local_irq_enable(void)
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{
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unsigned long flags;
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__asm__ __volatile__ ("rsil %0, 0" : "=a" (flags) :: "memory");
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}
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static inline int irqs_disabled(void)
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{
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unsigned long flags;
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local_save_flags(flags);
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return flags & 0xf;
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}
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#define RSR_CPENABLE(x) do { \
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__asm__ __volatile__("rsr %0," __stringify(CPENABLE) : "=a" (x)); \
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} while(0);
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#define WSR_CPENABLE(x) do { \
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__asm__ __volatile__("wsr %0," __stringify(CPENABLE)";rsync" \
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:: "a" (x));} while(0);
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#define clear_cpenable() __clear_cpenable()
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static inline void __clear_cpenable(void)
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{
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#if XCHAL_HAVE_CP
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unsigned long i = 0;
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WSR_CPENABLE(i);
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#endif
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}
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static inline void enable_coprocessor(int i)
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{
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#if XCHAL_HAVE_CP
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int cp;
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RSR_CPENABLE(cp);
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cp |= 1 << i;
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WSR_CPENABLE(cp);
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#endif
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}
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static inline void disable_coprocessor(int i)
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{
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#if XCHAL_HAVE_CP
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int cp;
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RSR_CPENABLE(cp);
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cp &= ~(1 << i);
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WSR_CPENABLE(cp);
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#endif
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}
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#define smp_read_barrier_depends() do { } while(0)
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#define read_barrier_depends() do { } while(0)
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#define mb() barrier()
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#define rmb() mb()
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#define wmb() mb()
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#ifdef CONFIG_SMP
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#error smp_* not defined
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#else
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#endif
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb(); } while (0)
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#if !defined (__ASSEMBLY__)
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/* * switch_to(n) should switch tasks to task nr n, first
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* checking that n isn't the current task, in which case it does nothing.
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*/
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extern void *_switch_to(void *last, void *next);
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#endif /* __ASSEMBLY__ */
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#define prepare_to_switch() do { } while(0)
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#define switch_to(prev,next,last) \
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do { \
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clear_cpenable(); \
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(last) = _switch_to(prev, next); \
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} while(0)
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/*
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* cmpxchg
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*/
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static inline unsigned long
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__cmpxchg_u32(volatile int *p, int old, int new)
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{
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__asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %1, 0 \n\t"
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"bne %0, %2, 1f \n\t"
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"s32i %3, %1, 0 \n\t"
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"1: \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n\t"
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: "=&a" (old)
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: "a" (p), "a" (old), "r" (new)
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: "a15", "memory");
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return old;
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}
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/* This function doesn't exist, so you'll get a linker error
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* if something tries to do an invalid cmpxchg(). */
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extern void __cmpxchg_called_with_bad_pointer(void);
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static __inline__ unsigned long
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
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{
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switch (size) {
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case 4: return __cmpxchg_u32(ptr, old, new);
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default: __cmpxchg_called_with_bad_pointer();
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return old;
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}
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}
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#define cmpxchg(ptr,o,n) \
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({ __typeof__(*(ptr)) _o_ = (o); \
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__typeof__(*(ptr)) _n_ = (n); \
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(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
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(unsigned long)_n_, sizeof (*(ptr))); \
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})
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/*
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* xchg_u32
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*
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* Note that a15 is used here because the register allocation
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* done by the compiler is not guaranteed and a window overflow
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* may not occur between the rsil and wsr instructions. By using
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* a15 in the rsil, the machine is guaranteed to be in a state
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* where no register reference will cause an overflow.
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*/
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static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
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{
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unsigned long tmp;
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__asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %1, 0 \n\t"
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"s32i %2, %1, 0 \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n\t"
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: "=&a" (tmp)
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: "a" (m), "a" (val)
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: "a15", "memory");
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return tmp;
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}
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#define tas(ptr) (xchg((ptr),1))
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#if ( __XCC__ == 1 )
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/* xt-xcc processes __inline__ differently than xt-gcc and decides to
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* insert an out-of-line copy of function __xchg. This presents the
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* unresolved symbol at link time of __xchg_called_with_bad_pointer,
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* even though such a function would never be called at run-time.
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* xt-gcc always inlines __xchg, and optimizes away the undefined
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* bad_pointer function.
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*/
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#define xchg(ptr,x) xchg_u32(ptr,x)
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#else /* assume xt-gcc */
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#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
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/*
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* This only works if the compiler isn't horribly bad at optimizing.
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* gcc-2.5.8 reportedly can't handle this, but I define that one to
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* be dead anyway.
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*/
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extern void __xchg_called_with_bad_pointer(void);
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static __inline__ unsigned long
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__xchg(unsigned long x, volatile void * ptr, int size)
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{
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switch (size) {
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case 4:
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return xchg_u32(ptr, x);
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}
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__xchg_called_with_bad_pointer();
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return x;
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}
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#endif
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extern void set_except_vector(int n, void *addr);
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static inline void spill_registers(void)
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{
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unsigned int a0, ps;
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__asm__ __volatile__ (
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"movi a14," __stringify (PS_EXCM_MASK) " | 1\n\t"
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"mov a12, a0\n\t"
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"rsr a13," __stringify(SAR) "\n\t"
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"xsr a14," __stringify(PS) "\n\t"
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"movi a0, _spill_registers\n\t"
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"rsync\n\t"
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"callx0 a0\n\t"
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"mov a0, a12\n\t"
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"wsr a13," __stringify(SAR) "\n\t"
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"wsr a14," __stringify(PS) "\n\t"
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:: "a" (&a0), "a" (&ps)
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: "a2", "a3", "a12", "a13", "a14", "a15", "memory");
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}
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#define arch_align_stack(x) (x)
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#endif /* _XTENSA_SYSTEM_H */
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