935 lines
24 KiB
C
935 lines
24 KiB
C
/*
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* guest access functions
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*
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* Copyright IBM Corp. 2014
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*
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*/
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#include <linux/vmalloc.h>
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#include <linux/err.h>
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#include <asm/pgtable.h>
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#include "kvm-s390.h"
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#include "gaccess.h"
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#include <asm/switch_to.h>
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union asce {
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unsigned long val;
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struct {
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unsigned long origin : 52; /* Region- or Segment-Table Origin */
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unsigned long : 2;
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unsigned long g : 1; /* Subspace Group Control */
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unsigned long p : 1; /* Private Space Control */
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unsigned long s : 1; /* Storage-Alteration-Event Control */
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unsigned long x : 1; /* Space-Switch-Event Control */
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unsigned long r : 1; /* Real-Space Control */
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unsigned long : 1;
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unsigned long dt : 2; /* Designation-Type Control */
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unsigned long tl : 2; /* Region- or Segment-Table Length */
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};
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};
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enum {
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ASCE_TYPE_SEGMENT = 0,
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ASCE_TYPE_REGION3 = 1,
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ASCE_TYPE_REGION2 = 2,
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ASCE_TYPE_REGION1 = 3
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};
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union region1_table_entry {
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unsigned long val;
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struct {
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unsigned long rto: 52;/* Region-Table Origin */
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unsigned long : 2;
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 1;
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unsigned long tf : 2; /* Region-Second-Table Offset */
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long : 1;
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long tl : 2; /* Region-Second-Table Length */
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};
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};
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union region2_table_entry {
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unsigned long val;
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struct {
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unsigned long rto: 52;/* Region-Table Origin */
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unsigned long : 2;
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 1;
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unsigned long tf : 2; /* Region-Third-Table Offset */
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long : 1;
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long tl : 2; /* Region-Third-Table Length */
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};
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};
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struct region3_table_entry_fc0 {
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unsigned long sto: 52;/* Segment-Table Origin */
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unsigned long : 1;
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 1;
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unsigned long tf : 2; /* Segment-Table Offset */
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long cr : 1; /* Common-Region Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long tl : 2; /* Segment-Table Length */
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};
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struct region3_table_entry_fc1 {
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unsigned long rfaa : 33; /* Region-Frame Absolute Address */
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unsigned long : 14;
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unsigned long av : 1; /* ACCF-Validity Control */
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unsigned long acc: 4; /* Access-Control Bits */
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unsigned long f : 1; /* Fetch-Protection Bit */
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long co : 1; /* Change-Recording Override */
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unsigned long : 2;
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long cr : 1; /* Common-Region Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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union region3_table_entry {
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unsigned long val;
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struct region3_table_entry_fc0 fc0;
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struct region3_table_entry_fc1 fc1;
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struct {
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unsigned long : 53;
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unsigned long fc : 1; /* Format-Control */
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unsigned long : 4;
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unsigned long i : 1; /* Region-Invalid Bit */
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unsigned long cr : 1; /* Common-Region Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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};
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struct segment_entry_fc0 {
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unsigned long pto: 53;/* Page-Table Origin */
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long : 3;
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unsigned long i : 1; /* Segment-Invalid Bit */
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unsigned long cs : 1; /* Common-Segment Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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struct segment_entry_fc1 {
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unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
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unsigned long : 3;
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unsigned long av : 1; /* ACCF-Validity Control */
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unsigned long acc: 4; /* Access-Control Bits */
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unsigned long f : 1; /* Fetch-Protection Bit */
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unsigned long fc : 1; /* Format-Control */
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long co : 1; /* Change-Recording Override */
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unsigned long : 2;
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unsigned long i : 1; /* Segment-Invalid Bit */
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unsigned long cs : 1; /* Common-Segment Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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union segment_table_entry {
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unsigned long val;
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struct segment_entry_fc0 fc0;
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struct segment_entry_fc1 fc1;
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struct {
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unsigned long : 53;
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unsigned long fc : 1; /* Format-Control */
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unsigned long : 4;
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unsigned long i : 1; /* Segment-Invalid Bit */
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unsigned long cs : 1; /* Common-Segment Bit */
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unsigned long tt : 2; /* Table-Type Bits */
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unsigned long : 2;
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};
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};
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enum {
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TABLE_TYPE_SEGMENT = 0,
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TABLE_TYPE_REGION3 = 1,
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TABLE_TYPE_REGION2 = 2,
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TABLE_TYPE_REGION1 = 3
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};
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union page_table_entry {
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unsigned long val;
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struct {
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unsigned long pfra : 52; /* Page-Frame Real Address */
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unsigned long z : 1; /* Zero Bit */
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unsigned long i : 1; /* Page-Invalid Bit */
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unsigned long p : 1; /* DAT-Protection Bit */
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unsigned long co : 1; /* Change-Recording Override */
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unsigned long : 8;
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};
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};
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/*
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* vaddress union in order to easily decode a virtual address into its
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* region first index, region second index etc. parts.
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*/
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union vaddress {
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unsigned long addr;
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struct {
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unsigned long rfx : 11;
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unsigned long rsx : 11;
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unsigned long rtx : 11;
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unsigned long sx : 11;
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unsigned long px : 8;
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unsigned long bx : 12;
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};
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struct {
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unsigned long rfx01 : 2;
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unsigned long : 9;
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unsigned long rsx01 : 2;
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unsigned long : 9;
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unsigned long rtx01 : 2;
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unsigned long : 9;
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unsigned long sx01 : 2;
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unsigned long : 29;
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};
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};
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/*
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* raddress union which will contain the result (real or absolute address)
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* after a page table walk. The rfaa, sfaa and pfra members are used to
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* simply assign them the value of a region, segment or page table entry.
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*/
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union raddress {
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unsigned long addr;
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unsigned long rfaa : 33; /* Region-Frame Absolute Address */
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unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
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unsigned long pfra : 52; /* Page-Frame Real Address */
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};
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union alet {
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u32 val;
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struct {
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u32 reserved : 7;
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u32 p : 1;
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u32 alesn : 8;
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u32 alen : 16;
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};
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};
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union ald {
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u32 val;
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struct {
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u32 : 1;
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u32 alo : 24;
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u32 all : 7;
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};
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};
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struct ale {
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unsigned long i : 1; /* ALEN-Invalid Bit */
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unsigned long : 5;
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unsigned long fo : 1; /* Fetch-Only Bit */
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unsigned long p : 1; /* Private Bit */
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unsigned long alesn : 8; /* Access-List-Entry Sequence Number */
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unsigned long aleax : 16; /* Access-List-Entry Authorization Index */
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unsigned long : 32;
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unsigned long : 1;
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unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */
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unsigned long : 6;
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unsigned long astesn : 32; /* ASTE Sequence Number */
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} __packed;
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struct aste {
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unsigned long i : 1; /* ASX-Invalid Bit */
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unsigned long ato : 29; /* Authority-Table Origin */
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unsigned long : 1;
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unsigned long b : 1; /* Base-Space Bit */
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unsigned long ax : 16; /* Authorization Index */
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unsigned long atl : 12; /* Authority-Table Length */
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unsigned long : 2;
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unsigned long ca : 1; /* Controlled-ASN Bit */
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unsigned long ra : 1; /* Reusable-ASN Bit */
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unsigned long asce : 64; /* Address-Space-Control Element */
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unsigned long ald : 32;
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unsigned long astesn : 32;
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/* .. more fields there */
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} __packed;
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int ipte_lock_held(struct kvm_vcpu *vcpu)
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{
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if (vcpu->arch.sie_block->eca & 1) {
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int rc;
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read_lock(&vcpu->kvm->arch.sca_lock);
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rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0;
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read_unlock(&vcpu->kvm->arch.sca_lock);
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return rc;
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}
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return vcpu->kvm->arch.ipte_lock_count != 0;
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}
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static void ipte_lock_simple(struct kvm_vcpu *vcpu)
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{
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union ipte_control old, new, *ic;
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mutex_lock(&vcpu->kvm->arch.ipte_mutex);
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vcpu->kvm->arch.ipte_lock_count++;
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if (vcpu->kvm->arch.ipte_lock_count > 1)
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goto out;
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retry:
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read_lock(&vcpu->kvm->arch.sca_lock);
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ic = kvm_s390_get_ipte_control(vcpu->kvm);
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do {
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old = READ_ONCE(*ic);
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if (old.k) {
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read_unlock(&vcpu->kvm->arch.sca_lock);
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cond_resched();
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goto retry;
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}
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new = old;
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new.k = 1;
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} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
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read_unlock(&vcpu->kvm->arch.sca_lock);
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out:
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mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
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}
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static void ipte_unlock_simple(struct kvm_vcpu *vcpu)
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{
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union ipte_control old, new, *ic;
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mutex_lock(&vcpu->kvm->arch.ipte_mutex);
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vcpu->kvm->arch.ipte_lock_count--;
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if (vcpu->kvm->arch.ipte_lock_count)
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goto out;
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read_lock(&vcpu->kvm->arch.sca_lock);
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ic = kvm_s390_get_ipte_control(vcpu->kvm);
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do {
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old = READ_ONCE(*ic);
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new = old;
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new.k = 0;
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} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
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read_unlock(&vcpu->kvm->arch.sca_lock);
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wake_up(&vcpu->kvm->arch.ipte_wq);
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out:
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mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
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}
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static void ipte_lock_siif(struct kvm_vcpu *vcpu)
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{
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union ipte_control old, new, *ic;
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retry:
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read_lock(&vcpu->kvm->arch.sca_lock);
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ic = kvm_s390_get_ipte_control(vcpu->kvm);
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do {
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old = READ_ONCE(*ic);
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if (old.kg) {
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read_unlock(&vcpu->kvm->arch.sca_lock);
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cond_resched();
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goto retry;
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}
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new = old;
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new.k = 1;
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new.kh++;
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} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
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read_unlock(&vcpu->kvm->arch.sca_lock);
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}
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static void ipte_unlock_siif(struct kvm_vcpu *vcpu)
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{
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union ipte_control old, new, *ic;
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read_lock(&vcpu->kvm->arch.sca_lock);
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ic = kvm_s390_get_ipte_control(vcpu->kvm);
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do {
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old = READ_ONCE(*ic);
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new = old;
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new.kh--;
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if (!new.kh)
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new.k = 0;
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} while (cmpxchg(&ic->val, old.val, new.val) != old.val);
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read_unlock(&vcpu->kvm->arch.sca_lock);
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if (!new.kh)
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wake_up(&vcpu->kvm->arch.ipte_wq);
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}
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void ipte_lock(struct kvm_vcpu *vcpu)
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{
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if (vcpu->arch.sie_block->eca & 1)
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ipte_lock_siif(vcpu);
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else
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ipte_lock_simple(vcpu);
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}
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void ipte_unlock(struct kvm_vcpu *vcpu)
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{
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if (vcpu->arch.sie_block->eca & 1)
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ipte_unlock_siif(vcpu);
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else
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ipte_unlock_simple(vcpu);
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}
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static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, ar_t ar,
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enum gacc_mode mode)
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{
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union alet alet;
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struct ale ale;
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struct aste aste;
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unsigned long ald_addr, authority_table_addr;
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union ald ald;
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int eax, rc;
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u8 authority_table;
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if (ar >= NUM_ACRS)
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return -EINVAL;
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save_access_regs(vcpu->run->s.regs.acrs);
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alet.val = vcpu->run->s.regs.acrs[ar];
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if (ar == 0 || alet.val == 0) {
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asce->val = vcpu->arch.sie_block->gcr[1];
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return 0;
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} else if (alet.val == 1) {
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asce->val = vcpu->arch.sie_block->gcr[7];
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return 0;
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}
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if (alet.reserved)
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return PGM_ALET_SPECIFICATION;
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if (alet.p)
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ald_addr = vcpu->arch.sie_block->gcr[5];
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else
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ald_addr = vcpu->arch.sie_block->gcr[2];
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ald_addr &= 0x7fffffc0;
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rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald));
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if (rc)
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return rc;
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if (alet.alen / 8 > ald.all)
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return PGM_ALEN_TRANSLATION;
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if (0x7fffffff - ald.alo * 128 < alet.alen * 16)
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return PGM_ADDRESSING;
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rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale,
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sizeof(struct ale));
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if (rc)
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return rc;
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if (ale.i == 1)
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return PGM_ALEN_TRANSLATION;
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if (ale.alesn != alet.alesn)
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return PGM_ALE_SEQUENCE;
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rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste));
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if (rc)
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return rc;
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if (aste.i)
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return PGM_ASTE_VALIDITY;
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if (aste.astesn != ale.astesn)
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return PGM_ASTE_SEQUENCE;
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|
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if (ale.p == 1) {
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eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff;
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if (ale.aleax != eax) {
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if (eax / 16 > aste.atl)
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return PGM_EXTENDED_AUTHORITY;
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|
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authority_table_addr = aste.ato * 4 + eax / 4;
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|
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rc = read_guest_real(vcpu, authority_table_addr,
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&authority_table,
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sizeof(u8));
|
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if (rc)
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return rc;
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|
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if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0)
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return PGM_EXTENDED_AUTHORITY;
|
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}
|
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}
|
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|
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if (ale.fo == 1 && mode == GACC_STORE)
|
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return PGM_PROTECTION;
|
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|
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asce->val = aste.asce;
|
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return 0;
|
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}
|
|
|
|
struct trans_exc_code_bits {
|
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unsigned long addr : 52; /* Translation-exception Address */
|
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unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */
|
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unsigned long : 6;
|
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unsigned long b60 : 1;
|
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unsigned long b61 : 1;
|
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unsigned long as : 2; /* ASCE Identifier */
|
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};
|
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|
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enum {
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FSI_UNKNOWN = 0, /* Unknown wether fetch or store */
|
|
FSI_STORE = 1, /* Exception was due to store operation */
|
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FSI_FETCH = 2 /* Exception was due to fetch operation */
|
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};
|
|
|
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static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce,
|
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ar_t ar, enum gacc_mode mode)
|
|
{
|
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int rc;
|
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struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw);
|
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struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
|
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struct trans_exc_code_bits *tec_bits;
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|
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memset(pgm, 0, sizeof(*pgm));
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tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
|
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tec_bits->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH;
|
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tec_bits->as = psw.as;
|
|
|
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if (!psw.t) {
|
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asce->val = 0;
|
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asce->r = 1;
|
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return 0;
|
|
}
|
|
|
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if (mode == GACC_IFETCH)
|
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psw.as = psw.as == PSW_AS_HOME ? PSW_AS_HOME : PSW_AS_PRIMARY;
|
|
|
|
switch (psw.as) {
|
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case PSW_AS_PRIMARY:
|
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asce->val = vcpu->arch.sie_block->gcr[1];
|
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return 0;
|
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case PSW_AS_SECONDARY:
|
|
asce->val = vcpu->arch.sie_block->gcr[7];
|
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return 0;
|
|
case PSW_AS_HOME:
|
|
asce->val = vcpu->arch.sie_block->gcr[13];
|
|
return 0;
|
|
case PSW_AS_ACCREG:
|
|
rc = ar_translation(vcpu, asce, ar, mode);
|
|
switch (rc) {
|
|
case PGM_ALEN_TRANSLATION:
|
|
case PGM_ALE_SEQUENCE:
|
|
case PGM_ASTE_VALIDITY:
|
|
case PGM_ASTE_SEQUENCE:
|
|
case PGM_EXTENDED_AUTHORITY:
|
|
vcpu->arch.pgm.exc_access_id = ar;
|
|
break;
|
|
case PGM_PROTECTION:
|
|
tec_bits->b60 = 1;
|
|
tec_bits->b61 = 1;
|
|
break;
|
|
}
|
|
if (rc > 0)
|
|
pgm->code = rc;
|
|
return rc;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val)
|
|
{
|
|
return kvm_read_guest(kvm, gpa, val, sizeof(*val));
|
|
}
|
|
|
|
/**
|
|
* guest_translate - translate a guest virtual into a guest absolute address
|
|
* @vcpu: virtual cpu
|
|
* @gva: guest virtual address
|
|
* @gpa: points to where guest physical (absolute) address should be stored
|
|
* @asce: effective asce
|
|
* @mode: indicates the access mode to be used
|
|
*
|
|
* Translate a guest virtual address into a guest absolute address by means
|
|
* of dynamic address translation as specified by the architecture.
|
|
* If the resulting absolute address is not available in the configuration
|
|
* an addressing exception is indicated and @gpa will not be changed.
|
|
*
|
|
* Returns: - zero on success; @gpa contains the resulting absolute address
|
|
* - a negative value if guest access failed due to e.g. broken
|
|
* guest mapping
|
|
* - a positve value if an access exception happened. In this case
|
|
* the returned value is the program interruption code as defined
|
|
* by the architecture
|
|
*/
|
|
static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva,
|
|
unsigned long *gpa, const union asce asce,
|
|
enum gacc_mode mode)
|
|
{
|
|
union vaddress vaddr = {.addr = gva};
|
|
union raddress raddr = {.addr = gva};
|
|
union page_table_entry pte;
|
|
int dat_protection = 0;
|
|
union ctlreg0 ctlreg0;
|
|
unsigned long ptr;
|
|
int edat1, edat2;
|
|
|
|
ctlreg0.val = vcpu->arch.sie_block->gcr[0];
|
|
edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8);
|
|
edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78);
|
|
if (asce.r)
|
|
goto real_address;
|
|
ptr = asce.origin * 4096;
|
|
switch (asce.dt) {
|
|
case ASCE_TYPE_REGION1:
|
|
if (vaddr.rfx01 > asce.tl)
|
|
return PGM_REGION_FIRST_TRANS;
|
|
ptr += vaddr.rfx * 8;
|
|
break;
|
|
case ASCE_TYPE_REGION2:
|
|
if (vaddr.rfx)
|
|
return PGM_ASCE_TYPE;
|
|
if (vaddr.rsx01 > asce.tl)
|
|
return PGM_REGION_SECOND_TRANS;
|
|
ptr += vaddr.rsx * 8;
|
|
break;
|
|
case ASCE_TYPE_REGION3:
|
|
if (vaddr.rfx || vaddr.rsx)
|
|
return PGM_ASCE_TYPE;
|
|
if (vaddr.rtx01 > asce.tl)
|
|
return PGM_REGION_THIRD_TRANS;
|
|
ptr += vaddr.rtx * 8;
|
|
break;
|
|
case ASCE_TYPE_SEGMENT:
|
|
if (vaddr.rfx || vaddr.rsx || vaddr.rtx)
|
|
return PGM_ASCE_TYPE;
|
|
if (vaddr.sx01 > asce.tl)
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
ptr += vaddr.sx * 8;
|
|
break;
|
|
}
|
|
switch (asce.dt) {
|
|
case ASCE_TYPE_REGION1: {
|
|
union region1_table_entry rfte;
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
return PGM_ADDRESSING;
|
|
if (deref_table(vcpu->kvm, ptr, &rfte.val))
|
|
return -EFAULT;
|
|
if (rfte.i)
|
|
return PGM_REGION_FIRST_TRANS;
|
|
if (rfte.tt != TABLE_TYPE_REGION1)
|
|
return PGM_TRANSLATION_SPEC;
|
|
if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl)
|
|
return PGM_REGION_SECOND_TRANS;
|
|
if (edat1)
|
|
dat_protection |= rfte.p;
|
|
ptr = rfte.rto * 4096 + vaddr.rsx * 8;
|
|
}
|
|
/* fallthrough */
|
|
case ASCE_TYPE_REGION2: {
|
|
union region2_table_entry rste;
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
return PGM_ADDRESSING;
|
|
if (deref_table(vcpu->kvm, ptr, &rste.val))
|
|
return -EFAULT;
|
|
if (rste.i)
|
|
return PGM_REGION_SECOND_TRANS;
|
|
if (rste.tt != TABLE_TYPE_REGION2)
|
|
return PGM_TRANSLATION_SPEC;
|
|
if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl)
|
|
return PGM_REGION_THIRD_TRANS;
|
|
if (edat1)
|
|
dat_protection |= rste.p;
|
|
ptr = rste.rto * 4096 + vaddr.rtx * 8;
|
|
}
|
|
/* fallthrough */
|
|
case ASCE_TYPE_REGION3: {
|
|
union region3_table_entry rtte;
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
return PGM_ADDRESSING;
|
|
if (deref_table(vcpu->kvm, ptr, &rtte.val))
|
|
return -EFAULT;
|
|
if (rtte.i)
|
|
return PGM_REGION_THIRD_TRANS;
|
|
if (rtte.tt != TABLE_TYPE_REGION3)
|
|
return PGM_TRANSLATION_SPEC;
|
|
if (rtte.cr && asce.p && edat2)
|
|
return PGM_TRANSLATION_SPEC;
|
|
if (rtte.fc && edat2) {
|
|
dat_protection |= rtte.fc1.p;
|
|
raddr.rfaa = rtte.fc1.rfaa;
|
|
goto absolute_address;
|
|
}
|
|
if (vaddr.sx01 < rtte.fc0.tf)
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
if (vaddr.sx01 > rtte.fc0.tl)
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
if (edat1)
|
|
dat_protection |= rtte.fc0.p;
|
|
ptr = rtte.fc0.sto * 4096 + vaddr.sx * 8;
|
|
}
|
|
/* fallthrough */
|
|
case ASCE_TYPE_SEGMENT: {
|
|
union segment_table_entry ste;
|
|
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
return PGM_ADDRESSING;
|
|
if (deref_table(vcpu->kvm, ptr, &ste.val))
|
|
return -EFAULT;
|
|
if (ste.i)
|
|
return PGM_SEGMENT_TRANSLATION;
|
|
if (ste.tt != TABLE_TYPE_SEGMENT)
|
|
return PGM_TRANSLATION_SPEC;
|
|
if (ste.cs && asce.p)
|
|
return PGM_TRANSLATION_SPEC;
|
|
if (ste.fc && edat1) {
|
|
dat_protection |= ste.fc1.p;
|
|
raddr.sfaa = ste.fc1.sfaa;
|
|
goto absolute_address;
|
|
}
|
|
dat_protection |= ste.fc0.p;
|
|
ptr = ste.fc0.pto * 2048 + vaddr.px * 8;
|
|
}
|
|
}
|
|
if (kvm_is_error_gpa(vcpu->kvm, ptr))
|
|
return PGM_ADDRESSING;
|
|
if (deref_table(vcpu->kvm, ptr, &pte.val))
|
|
return -EFAULT;
|
|
if (pte.i)
|
|
return PGM_PAGE_TRANSLATION;
|
|
if (pte.z)
|
|
return PGM_TRANSLATION_SPEC;
|
|
if (pte.co && !edat1)
|
|
return PGM_TRANSLATION_SPEC;
|
|
dat_protection |= pte.p;
|
|
raddr.pfra = pte.pfra;
|
|
real_address:
|
|
raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr);
|
|
absolute_address:
|
|
if (mode == GACC_STORE && dat_protection)
|
|
return PGM_PROTECTION;
|
|
if (kvm_is_error_gpa(vcpu->kvm, raddr.addr))
|
|
return PGM_ADDRESSING;
|
|
*gpa = raddr.addr;
|
|
return 0;
|
|
}
|
|
|
|
static inline int is_low_address(unsigned long ga)
|
|
{
|
|
/* Check for address ranges 0..511 and 4096..4607 */
|
|
return (ga & ~0x11fful) == 0;
|
|
}
|
|
|
|
static int low_address_protection_enabled(struct kvm_vcpu *vcpu,
|
|
const union asce asce)
|
|
{
|
|
union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
|
|
|
if (!ctlreg0.lap)
|
|
return 0;
|
|
if (psw_bits(*psw).t && asce.p)
|
|
return 0;
|
|
return 1;
|
|
}
|
|
|
|
static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga,
|
|
unsigned long *pages, unsigned long nr_pages,
|
|
const union asce asce, enum gacc_mode mode)
|
|
{
|
|
struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
|
struct trans_exc_code_bits *tec_bits;
|
|
int lap_enabled, rc;
|
|
|
|
tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
|
|
lap_enabled = low_address_protection_enabled(vcpu, asce);
|
|
while (nr_pages) {
|
|
ga = kvm_s390_logical_to_effective(vcpu, ga);
|
|
tec_bits->addr = ga >> PAGE_SHIFT;
|
|
if (mode == GACC_STORE && lap_enabled && is_low_address(ga)) {
|
|
pgm->code = PGM_PROTECTION;
|
|
return pgm->code;
|
|
}
|
|
ga &= PAGE_MASK;
|
|
if (psw_bits(*psw).t) {
|
|
rc = guest_translate(vcpu, ga, pages, asce, mode);
|
|
if (rc < 0)
|
|
return rc;
|
|
if (rc == PGM_PROTECTION)
|
|
tec_bits->b61 = 1;
|
|
if (rc)
|
|
pgm->code = rc;
|
|
} else {
|
|
*pages = kvm_s390_real_to_abs(vcpu, ga);
|
|
if (kvm_is_error_gpa(vcpu->kvm, *pages))
|
|
pgm->code = PGM_ADDRESSING;
|
|
}
|
|
if (pgm->code)
|
|
return pgm->code;
|
|
ga += PAGE_SIZE;
|
|
pages++;
|
|
nr_pages--;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data,
|
|
unsigned long len, enum gacc_mode mode)
|
|
{
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
|
unsigned long _len, nr_pages, gpa, idx;
|
|
unsigned long pages_array[2];
|
|
unsigned long *pages;
|
|
int need_ipte_lock;
|
|
union asce asce;
|
|
int rc;
|
|
|
|
if (!len)
|
|
return 0;
|
|
rc = get_vcpu_asce(vcpu, &asce, ar, mode);
|
|
if (rc)
|
|
return rc;
|
|
nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1;
|
|
pages = pages_array;
|
|
if (nr_pages > ARRAY_SIZE(pages_array))
|
|
pages = vmalloc(nr_pages * sizeof(unsigned long));
|
|
if (!pages)
|
|
return -ENOMEM;
|
|
need_ipte_lock = psw_bits(*psw).t && !asce.r;
|
|
if (need_ipte_lock)
|
|
ipte_lock(vcpu);
|
|
rc = guest_page_range(vcpu, ga, pages, nr_pages, asce, mode);
|
|
for (idx = 0; idx < nr_pages && !rc; idx++) {
|
|
gpa = *(pages + idx) + (ga & ~PAGE_MASK);
|
|
_len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
|
|
if (mode == GACC_STORE)
|
|
rc = kvm_write_guest(vcpu->kvm, gpa, data, _len);
|
|
else
|
|
rc = kvm_read_guest(vcpu->kvm, gpa, data, _len);
|
|
len -= _len;
|
|
ga += _len;
|
|
data += _len;
|
|
}
|
|
if (need_ipte_lock)
|
|
ipte_unlock(vcpu);
|
|
if (nr_pages > ARRAY_SIZE(pages_array))
|
|
vfree(pages);
|
|
return rc;
|
|
}
|
|
|
|
int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra,
|
|
void *data, unsigned long len, enum gacc_mode mode)
|
|
{
|
|
unsigned long _len, gpa;
|
|
int rc = 0;
|
|
|
|
while (len && !rc) {
|
|
gpa = kvm_s390_real_to_abs(vcpu, gra);
|
|
_len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
|
|
if (mode)
|
|
rc = write_guest_abs(vcpu, gpa, data, _len);
|
|
else
|
|
rc = read_guest_abs(vcpu, gpa, data, _len);
|
|
len -= _len;
|
|
gra += _len;
|
|
data += _len;
|
|
}
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* guest_translate_address - translate guest logical into guest absolute address
|
|
*
|
|
* Parameter semantics are the same as the ones from guest_translate.
|
|
* The memory contents at the guest address are not changed.
|
|
*
|
|
* Note: The IPTE lock is not taken during this function, so the caller
|
|
* has to take care of this.
|
|
*/
|
|
int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
|
|
unsigned long *gpa, enum gacc_mode mode)
|
|
{
|
|
struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
|
struct trans_exc_code_bits *tec;
|
|
union asce asce;
|
|
int rc;
|
|
|
|
gva = kvm_s390_logical_to_effective(vcpu, gva);
|
|
tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
|
|
rc = get_vcpu_asce(vcpu, &asce, ar, mode);
|
|
tec->addr = gva >> PAGE_SHIFT;
|
|
if (rc)
|
|
return rc;
|
|
if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) {
|
|
if (mode == GACC_STORE) {
|
|
rc = pgm->code = PGM_PROTECTION;
|
|
return rc;
|
|
}
|
|
}
|
|
|
|
if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */
|
|
rc = guest_translate(vcpu, gva, gpa, asce, mode);
|
|
if (rc > 0) {
|
|
if (rc == PGM_PROTECTION)
|
|
tec->b61 = 1;
|
|
pgm->code = rc;
|
|
}
|
|
} else {
|
|
rc = 0;
|
|
*gpa = kvm_s390_real_to_abs(vcpu, gva);
|
|
if (kvm_is_error_gpa(vcpu->kvm, *gpa))
|
|
rc = pgm->code = PGM_ADDRESSING;
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* check_gva_range - test a range of guest virtual addresses for accessibility
|
|
*/
|
|
int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
|
|
unsigned long length, enum gacc_mode mode)
|
|
{
|
|
unsigned long gpa;
|
|
unsigned long currlen;
|
|
int rc = 0;
|
|
|
|
ipte_lock(vcpu);
|
|
while (length > 0 && !rc) {
|
|
currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE));
|
|
rc = guest_translate_address(vcpu, gva, ar, &gpa, mode);
|
|
gva += currlen;
|
|
length -= currlen;
|
|
}
|
|
ipte_unlock(vcpu);
|
|
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* kvm_s390_check_low_addr_prot_real - check for low-address protection
|
|
* @gra: Guest real address
|
|
*
|
|
* Checks whether an address is subject to low-address protection and set
|
|
* up vcpu->arch.pgm accordingly if necessary.
|
|
*
|
|
* Return: 0 if no protection exception, or PGM_PROTECTION if protected.
|
|
*/
|
|
int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra)
|
|
{
|
|
struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
|
|
psw_t *psw = &vcpu->arch.sie_block->gpsw;
|
|
struct trans_exc_code_bits *tec_bits;
|
|
union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
|
|
|
|
if (!ctlreg0.lap || !is_low_address(gra))
|
|
return 0;
|
|
|
|
memset(pgm, 0, sizeof(*pgm));
|
|
tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
|
|
tec_bits->fsi = FSI_STORE;
|
|
tec_bits->as = psw_bits(*psw).as;
|
|
tec_bits->addr = gra >> PAGE_SHIFT;
|
|
pgm->code = PGM_PROTECTION;
|
|
|
|
return pgm->code;
|
|
}
|