93 lines
2.4 KiB
Plaintext
93 lines
2.4 KiB
Plaintext
ARM Mali Bifrost GPU
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====================
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Required properties:
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- compatible :
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* Since Mali Bifrost GPU model/revision is fully discoverable by reading
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some determined registers, must contain the following:
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+ "arm,mali-bifrost"
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* which must be preceded by one of the following vendor specifics:
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+ "amlogic,meson-g12a-mali"
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- reg : Physical base address of the device and length of the register area.
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- interrupts : Contains the three IRQ lines required by Mali Bifrost devices,
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in the following defined order.
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- interrupt-names : Contains the names of IRQ resources in this exact defined
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order: "job", "mmu", "gpu".
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Optional properties:
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- clocks : Phandle to clock for the Mali Bifrost device.
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- mali-supply : Phandle to regulator for the Mali device. Refer to
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Documentation/devicetree/bindings/regulator/regulator.txt for details.
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- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt
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for details.
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- resets : Phandle of the GPU reset line.
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Vendor-specific bindings
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------------------------
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The Mali GPU is integrated very differently from one SoC to
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another. In order to accommodate those differences, you have the option
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to specify one more vendor-specific compatible, among:
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- "amlogic,meson-g12a-mali"
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Required properties:
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- resets : Should contain phandles of :
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+ GPU reset line
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+ GPU APB glue reset line
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Example for a Mali-G31:
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gpu@ffa30000 {
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compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
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reg = <0xffe40000 0x10000>;
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interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "job", "mmu", "gpu";
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clocks = <&clk CLKID_MALI>;
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mali-supply = <&vdd_gpu>;
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operating-points-v2 = <&gpu_opp_table>;
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resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
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};
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gpu_opp_table: opp_table0 {
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compatible = "operating-points-v2";
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opp@533000000 {
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opp-hz = /bits/ 64 <533000000>;
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opp-microvolt = <1250000>;
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};
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opp@450000000 {
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opp-hz = /bits/ 64 <450000000>;
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opp-microvolt = <1150000>;
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};
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opp@400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1125000>;
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};
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opp@350000000 {
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opp-hz = /bits/ 64 <350000000>;
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opp-microvolt = <1075000>;
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};
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opp@266000000 {
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opp-hz = /bits/ 64 <266000000>;
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opp-microvolt = <1025000>;
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};
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opp@160000000 {
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opp-hz = /bits/ 64 <160000000>;
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opp-microvolt = <925000>;
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};
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opp@100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-microvolt = <912500>;
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};
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};
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