658 lines
16 KiB
C
658 lines
16 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2012-2019 Red Hat
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License version 2. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* Authors: Matthew Garrett
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* Dave Airlie
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* Gerd Hoffmann
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*
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* Portions of this code derived from cirrusfb.c:
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* drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
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*
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* Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
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*/
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <video/cirrus.h>
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#include <video/vga.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_atomic_state_helper.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_damage_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_file.h>
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#include <drm/drm_format_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_shmem_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_ioctl.h>
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#include <drm/drm_modeset_helper_vtables.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_simple_kms_helper.h>
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#include <drm/drm_vblank.h>
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#define DRIVER_NAME "cirrus"
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#define DRIVER_DESC "qemu cirrus vga"
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#define DRIVER_DATE "2019"
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#define DRIVER_MAJOR 2
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#define DRIVER_MINOR 0
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#define CIRRUS_MAX_PITCH (0x1FF << 3) /* (4096 - 1) & ~111b bytes */
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#define CIRRUS_VRAM_SIZE (4 * 1024 * 1024) /* 4 MB */
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struct cirrus_device {
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struct drm_device dev;
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struct drm_simple_display_pipe pipe;
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struct drm_connector conn;
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unsigned int cpp;
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unsigned int pitch;
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void __iomem *vram;
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void __iomem *mmio;
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};
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/* ------------------------------------------------------------------ */
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/*
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* The meat of this driver. The core passes us a mode and we have to program
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* it. The modesetting here is the bare minimum required to satisfy the qemu
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* emulation of this hardware, and running this against a real device is
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* likely to result in an inadequately programmed mode. We've already had
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* the opportunity to modify the mode, so whatever we receive here should
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* be something that can be correctly programmed and displayed
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*/
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#define SEQ_INDEX 4
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#define SEQ_DATA 5
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static u8 rreg_seq(struct cirrus_device *cirrus, u8 reg)
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{
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iowrite8(reg, cirrus->mmio + SEQ_INDEX);
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return ioread8(cirrus->mmio + SEQ_DATA);
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}
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static void wreg_seq(struct cirrus_device *cirrus, u8 reg, u8 val)
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{
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iowrite8(reg, cirrus->mmio + SEQ_INDEX);
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iowrite8(val, cirrus->mmio + SEQ_DATA);
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}
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#define CRT_INDEX 0x14
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#define CRT_DATA 0x15
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static u8 rreg_crt(struct cirrus_device *cirrus, u8 reg)
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{
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iowrite8(reg, cirrus->mmio + CRT_INDEX);
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return ioread8(cirrus->mmio + CRT_DATA);
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}
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static void wreg_crt(struct cirrus_device *cirrus, u8 reg, u8 val)
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{
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iowrite8(reg, cirrus->mmio + CRT_INDEX);
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iowrite8(val, cirrus->mmio + CRT_DATA);
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}
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#define GFX_INDEX 0xe
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#define GFX_DATA 0xf
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static void wreg_gfx(struct cirrus_device *cirrus, u8 reg, u8 val)
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{
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iowrite8(reg, cirrus->mmio + GFX_INDEX);
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iowrite8(val, cirrus->mmio + GFX_DATA);
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}
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#define VGA_DAC_MASK 0x06
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static void wreg_hdr(struct cirrus_device *cirrus, u8 val)
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{
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ioread8(cirrus->mmio + VGA_DAC_MASK);
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ioread8(cirrus->mmio + VGA_DAC_MASK);
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ioread8(cirrus->mmio + VGA_DAC_MASK);
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ioread8(cirrus->mmio + VGA_DAC_MASK);
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iowrite8(val, cirrus->mmio + VGA_DAC_MASK);
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}
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static int cirrus_convert_to(struct drm_framebuffer *fb)
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{
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if (fb->format->cpp[0] == 4 && fb->pitches[0] > CIRRUS_MAX_PITCH) {
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if (fb->width * 3 <= CIRRUS_MAX_PITCH)
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/* convert from XR24 to RG24 */
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return 3;
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else
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/* convert from XR24 to RG16 */
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return 2;
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}
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return 0;
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}
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static int cirrus_cpp(struct drm_framebuffer *fb)
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{
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int convert_cpp = cirrus_convert_to(fb);
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if (convert_cpp)
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return convert_cpp;
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return fb->format->cpp[0];
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}
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static int cirrus_pitch(struct drm_framebuffer *fb)
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{
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int convert_cpp = cirrus_convert_to(fb);
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if (convert_cpp)
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return convert_cpp * fb->width;
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return fb->pitches[0];
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}
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static void cirrus_set_start_address(struct cirrus_device *cirrus, u32 offset)
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{
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u32 addr;
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u8 tmp;
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addr = offset >> 2;
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wreg_crt(cirrus, 0x0c, (u8)((addr >> 8) & 0xff));
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wreg_crt(cirrus, 0x0d, (u8)(addr & 0xff));
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tmp = rreg_crt(cirrus, 0x1b);
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tmp &= 0xf2;
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tmp |= (addr >> 16) & 0x01;
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tmp |= (addr >> 15) & 0x0c;
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wreg_crt(cirrus, 0x1b, tmp);
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tmp = rreg_crt(cirrus, 0x1d);
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tmp &= 0x7f;
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tmp |= (addr >> 12) & 0x80;
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wreg_crt(cirrus, 0x1d, tmp);
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}
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static int cirrus_mode_set(struct cirrus_device *cirrus,
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struct drm_display_mode *mode,
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struct drm_framebuffer *fb)
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{
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int hsyncstart, hsyncend, htotal, hdispend;
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int vtotal, vdispend;
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int tmp;
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int sr07 = 0, hdr = 0;
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htotal = mode->htotal / 8;
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hsyncend = mode->hsync_end / 8;
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hsyncstart = mode->hsync_start / 8;
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hdispend = mode->hdisplay / 8;
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vtotal = mode->vtotal;
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vdispend = mode->vdisplay;
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vdispend -= 1;
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vtotal -= 2;
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htotal -= 5;
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hdispend -= 1;
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hsyncstart += 1;
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hsyncend += 1;
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wreg_crt(cirrus, VGA_CRTC_V_SYNC_END, 0x20);
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wreg_crt(cirrus, VGA_CRTC_H_TOTAL, htotal);
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wreg_crt(cirrus, VGA_CRTC_H_DISP, hdispend);
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wreg_crt(cirrus, VGA_CRTC_H_SYNC_START, hsyncstart);
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wreg_crt(cirrus, VGA_CRTC_H_SYNC_END, hsyncend);
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wreg_crt(cirrus, VGA_CRTC_V_TOTAL, vtotal & 0xff);
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wreg_crt(cirrus, VGA_CRTC_V_DISP_END, vdispend & 0xff);
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tmp = 0x40;
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if ((vdispend + 1) & 512)
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tmp |= 0x20;
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wreg_crt(cirrus, VGA_CRTC_MAX_SCAN, tmp);
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/*
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* Overflow bits for values that don't fit in the standard registers
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*/
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tmp = 0x10;
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if (vtotal & 0x100)
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tmp |= 0x01;
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if (vdispend & 0x100)
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tmp |= 0x02;
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if ((vdispend + 1) & 0x100)
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tmp |= 0x08;
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if (vtotal & 0x200)
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tmp |= 0x20;
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if (vdispend & 0x200)
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tmp |= 0x40;
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wreg_crt(cirrus, VGA_CRTC_OVERFLOW, tmp);
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tmp = 0;
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/* More overflow bits */
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if ((htotal + 5) & 0x40)
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tmp |= 0x10;
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if ((htotal + 5) & 0x80)
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tmp |= 0x20;
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if (vtotal & 0x100)
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tmp |= 0x40;
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if (vtotal & 0x200)
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tmp |= 0x80;
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wreg_crt(cirrus, CL_CRT1A, tmp);
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/* Disable Hercules/CGA compatibility */
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wreg_crt(cirrus, VGA_CRTC_MODE, 0x03);
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sr07 = rreg_seq(cirrus, 0x07);
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sr07 &= 0xe0;
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hdr = 0;
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cirrus->cpp = cirrus_cpp(fb);
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switch (cirrus->cpp * 8) {
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case 8:
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sr07 |= 0x11;
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break;
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case 16:
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sr07 |= 0x17;
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hdr = 0xc1;
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break;
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case 24:
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sr07 |= 0x15;
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hdr = 0xc5;
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break;
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case 32:
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sr07 |= 0x19;
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hdr = 0xc5;
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break;
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default:
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return -1;
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}
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wreg_seq(cirrus, 0x7, sr07);
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/* Program the pitch */
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cirrus->pitch = cirrus_pitch(fb);
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tmp = cirrus->pitch / 8;
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wreg_crt(cirrus, VGA_CRTC_OFFSET, tmp);
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/* Enable extended blanking and pitch bits, and enable full memory */
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tmp = 0x22;
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tmp |= (cirrus->pitch >> 7) & 0x10;
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tmp |= (cirrus->pitch >> 6) & 0x40;
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wreg_crt(cirrus, 0x1b, tmp);
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/* Enable high-colour modes */
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wreg_gfx(cirrus, VGA_GFX_MODE, 0x40);
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/* And set graphics mode */
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wreg_gfx(cirrus, VGA_GFX_MISC, 0x01);
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wreg_hdr(cirrus, hdr);
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cirrus_set_start_address(cirrus, 0);
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/* Unblank (needed on S3 resume, vgabios doesn't do it then) */
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outb(0x20, 0x3c0);
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return 0;
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}
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static int cirrus_fb_blit_rect(struct drm_framebuffer *fb,
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struct drm_rect *rect)
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{
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struct cirrus_device *cirrus = fb->dev->dev_private;
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void *vmap;
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vmap = drm_gem_shmem_vmap(fb->obj[0]);
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if (!vmap)
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return -ENOMEM;
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if (cirrus->cpp == fb->format->cpp[0])
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drm_fb_memcpy_dstclip(cirrus->vram,
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vmap, fb, rect);
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else if (fb->format->cpp[0] == 4 && cirrus->cpp == 2)
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drm_fb_xrgb8888_to_rgb565_dstclip(cirrus->vram,
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cirrus->pitch,
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vmap, fb, rect, false);
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else if (fb->format->cpp[0] == 4 && cirrus->cpp == 3)
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drm_fb_xrgb8888_to_rgb888_dstclip(cirrus->vram,
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cirrus->pitch,
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vmap, fb, rect);
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else
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WARN_ON_ONCE("cpp mismatch");
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drm_gem_shmem_vunmap(fb->obj[0], vmap);
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return 0;
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}
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static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb)
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{
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struct drm_rect fullscreen = {
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.x1 = 0,
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.x2 = fb->width,
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.y1 = 0,
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.y2 = fb->height,
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};
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return cirrus_fb_blit_rect(fb, &fullscreen);
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}
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static int cirrus_check_size(int width, int height,
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struct drm_framebuffer *fb)
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{
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int pitch = width * 2;
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if (fb)
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pitch = cirrus_pitch(fb);
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if (pitch > CIRRUS_MAX_PITCH)
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return -EINVAL;
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if (pitch * height > CIRRUS_VRAM_SIZE)
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return -EINVAL;
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return 0;
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}
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/* ------------------------------------------------------------------ */
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/* cirrus connector */
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static int cirrus_conn_get_modes(struct drm_connector *conn)
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{
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int count;
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count = drm_add_modes_noedid(conn,
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conn->dev->mode_config.max_width,
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conn->dev->mode_config.max_height);
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drm_set_preferred_mode(conn, 1024, 768);
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return count;
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}
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static const struct drm_connector_helper_funcs cirrus_conn_helper_funcs = {
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.get_modes = cirrus_conn_get_modes,
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};
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static const struct drm_connector_funcs cirrus_conn_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = drm_connector_cleanup,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static int cirrus_conn_init(struct cirrus_device *cirrus)
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{
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drm_connector_helper_add(&cirrus->conn, &cirrus_conn_helper_funcs);
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return drm_connector_init(&cirrus->dev, &cirrus->conn,
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&cirrus_conn_funcs, DRM_MODE_CONNECTOR_VGA);
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}
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/* ------------------------------------------------------------------ */
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/* cirrus (simple) display pipe */
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static enum drm_mode_status cirrus_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
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const struct drm_display_mode *mode)
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{
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if (cirrus_check_size(mode->hdisplay, mode->vdisplay, NULL) < 0)
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return MODE_BAD;
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return MODE_OK;
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}
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static int cirrus_pipe_check(struct drm_simple_display_pipe *pipe,
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struct drm_plane_state *plane_state,
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struct drm_crtc_state *crtc_state)
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{
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struct drm_framebuffer *fb = plane_state->fb;
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if (!fb)
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return 0;
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return cirrus_check_size(fb->width, fb->height, fb);
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}
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static void cirrus_pipe_enable(struct drm_simple_display_pipe *pipe,
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struct drm_crtc_state *crtc_state,
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struct drm_plane_state *plane_state)
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{
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struct cirrus_device *cirrus = pipe->crtc.dev->dev_private;
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cirrus_mode_set(cirrus, &crtc_state->mode, plane_state->fb);
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cirrus_fb_blit_fullscreen(plane_state->fb);
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}
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static void cirrus_pipe_update(struct drm_simple_display_pipe *pipe,
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struct drm_plane_state *old_state)
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{
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struct cirrus_device *cirrus = pipe->crtc.dev->dev_private;
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struct drm_plane_state *state = pipe->plane.state;
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struct drm_crtc *crtc = &pipe->crtc;
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struct drm_rect rect;
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if (pipe->plane.state->fb &&
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cirrus->cpp != cirrus_cpp(pipe->plane.state->fb))
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cirrus_mode_set(cirrus, &crtc->mode,
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pipe->plane.state->fb);
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if (drm_atomic_helper_damage_merged(old_state, state, &rect))
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cirrus_fb_blit_rect(pipe->plane.state->fb, &rect);
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if (crtc->state->event) {
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spin_lock_irq(&crtc->dev->event_lock);
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drm_crtc_send_vblank_event(crtc, crtc->state->event);
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crtc->state->event = NULL;
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spin_unlock_irq(&crtc->dev->event_lock);
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}
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}
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static const struct drm_simple_display_pipe_funcs cirrus_pipe_funcs = {
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.mode_valid = cirrus_pipe_mode_valid,
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.check = cirrus_pipe_check,
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.enable = cirrus_pipe_enable,
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.update = cirrus_pipe_update,
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};
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static const uint32_t cirrus_formats[] = {
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DRM_FORMAT_RGB565,
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DRM_FORMAT_RGB888,
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DRM_FORMAT_XRGB8888,
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};
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static const uint64_t cirrus_modifiers[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_INVALID
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};
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static int cirrus_pipe_init(struct cirrus_device *cirrus)
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{
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return drm_simple_display_pipe_init(&cirrus->dev,
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&cirrus->pipe,
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&cirrus_pipe_funcs,
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cirrus_formats,
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ARRAY_SIZE(cirrus_formats),
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cirrus_modifiers,
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&cirrus->conn);
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}
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/* ------------------------------------------------------------------ */
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/* cirrus framebuffers & mode config */
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static struct drm_framebuffer*
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cirrus_fb_create(struct drm_device *dev, struct drm_file *file_priv,
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const struct drm_mode_fb_cmd2 *mode_cmd)
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{
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if (mode_cmd->pixel_format != DRM_FORMAT_RGB565 &&
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mode_cmd->pixel_format != DRM_FORMAT_RGB888 &&
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mode_cmd->pixel_format != DRM_FORMAT_XRGB8888)
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return ERR_PTR(-EINVAL);
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if (cirrus_check_size(mode_cmd->width, mode_cmd->height, NULL) < 0)
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return ERR_PTR(-EINVAL);
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return drm_gem_fb_create_with_dirty(dev, file_priv, mode_cmd);
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}
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static const struct drm_mode_config_funcs cirrus_mode_config_funcs = {
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.fb_create = cirrus_fb_create,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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};
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static void cirrus_mode_config_init(struct cirrus_device *cirrus)
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{
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struct drm_device *dev = &cirrus->dev;
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drm_mode_config_init(dev);
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dev->mode_config.min_width = 0;
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dev->mode_config.min_height = 0;
|
|
dev->mode_config.max_width = CIRRUS_MAX_PITCH / 2;
|
|
dev->mode_config.max_height = 1024;
|
|
dev->mode_config.preferred_depth = 16;
|
|
dev->mode_config.prefer_shadow = 0;
|
|
dev->mode_config.funcs = &cirrus_mode_config_funcs;
|
|
}
|
|
|
|
/* ------------------------------------------------------------------ */
|
|
|
|
DEFINE_DRM_GEM_FOPS(cirrus_fops);
|
|
|
|
static struct drm_driver cirrus_driver = {
|
|
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
|
|
|
|
.name = DRIVER_NAME,
|
|
.desc = DRIVER_DESC,
|
|
.date = DRIVER_DATE,
|
|
.major = DRIVER_MAJOR,
|
|
.minor = DRIVER_MINOR,
|
|
|
|
.fops = &cirrus_fops,
|
|
DRM_GEM_SHMEM_DRIVER_OPS,
|
|
};
|
|
|
|
static int cirrus_pci_probe(struct pci_dev *pdev,
|
|
const struct pci_device_id *ent)
|
|
{
|
|
struct drm_device *dev;
|
|
struct cirrus_device *cirrus;
|
|
int ret;
|
|
|
|
ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "cirrusdrmfb");
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = pci_enable_device(pdev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = pci_request_regions(pdev, DRIVER_NAME);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = -ENOMEM;
|
|
cirrus = kzalloc(sizeof(*cirrus), GFP_KERNEL);
|
|
if (cirrus == NULL)
|
|
goto err_pci_release;
|
|
|
|
dev = &cirrus->dev;
|
|
ret = drm_dev_init(dev, &cirrus_driver, &pdev->dev);
|
|
if (ret)
|
|
goto err_free_cirrus;
|
|
dev->dev_private = cirrus;
|
|
|
|
ret = -ENOMEM;
|
|
cirrus->vram = ioremap(pci_resource_start(pdev, 0),
|
|
pci_resource_len(pdev, 0));
|
|
if (cirrus->vram == NULL)
|
|
goto err_dev_put;
|
|
|
|
cirrus->mmio = ioremap(pci_resource_start(pdev, 1),
|
|
pci_resource_len(pdev, 1));
|
|
if (cirrus->mmio == NULL)
|
|
goto err_unmap_vram;
|
|
|
|
cirrus_mode_config_init(cirrus);
|
|
|
|
ret = cirrus_conn_init(cirrus);
|
|
if (ret < 0)
|
|
goto err_cleanup;
|
|
|
|
ret = cirrus_pipe_init(cirrus);
|
|
if (ret < 0)
|
|
goto err_cleanup;
|
|
|
|
drm_mode_config_reset(dev);
|
|
|
|
dev->pdev = pdev;
|
|
pci_set_drvdata(pdev, dev);
|
|
ret = drm_dev_register(dev, 0);
|
|
if (ret)
|
|
goto err_cleanup;
|
|
|
|
drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth);
|
|
return 0;
|
|
|
|
err_cleanup:
|
|
drm_mode_config_cleanup(dev);
|
|
iounmap(cirrus->mmio);
|
|
err_unmap_vram:
|
|
iounmap(cirrus->vram);
|
|
err_dev_put:
|
|
drm_dev_put(dev);
|
|
err_free_cirrus:
|
|
kfree(cirrus);
|
|
err_pci_release:
|
|
pci_release_regions(pdev);
|
|
return ret;
|
|
}
|
|
|
|
static void cirrus_pci_remove(struct pci_dev *pdev)
|
|
{
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
struct cirrus_device *cirrus = dev->dev_private;
|
|
|
|
drm_dev_unregister(dev);
|
|
drm_mode_config_cleanup(dev);
|
|
iounmap(cirrus->mmio);
|
|
iounmap(cirrus->vram);
|
|
drm_dev_put(dev);
|
|
kfree(cirrus);
|
|
pci_release_regions(pdev);
|
|
}
|
|
|
|
static const struct pci_device_id pciidlist[] = {
|
|
{
|
|
.vendor = PCI_VENDOR_ID_CIRRUS,
|
|
.device = PCI_DEVICE_ID_CIRRUS_5446,
|
|
/* only bind to the cirrus chip in qemu */
|
|
.subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
|
|
.subdevice = PCI_SUBDEVICE_ID_QEMU,
|
|
}, {
|
|
.vendor = PCI_VENDOR_ID_CIRRUS,
|
|
.device = PCI_DEVICE_ID_CIRRUS_5446,
|
|
.subvendor = PCI_VENDOR_ID_XEN,
|
|
.subdevice = 0x0001,
|
|
},
|
|
{ /* end if list */ }
|
|
};
|
|
|
|
static struct pci_driver cirrus_pci_driver = {
|
|
.name = DRIVER_NAME,
|
|
.id_table = pciidlist,
|
|
.probe = cirrus_pci_probe,
|
|
.remove = cirrus_pci_remove,
|
|
};
|
|
|
|
static int __init cirrus_init(void)
|
|
{
|
|
if (vgacon_text_force())
|
|
return -EINVAL;
|
|
return pci_register_driver(&cirrus_pci_driver);
|
|
}
|
|
|
|
static void __exit cirrus_exit(void)
|
|
{
|
|
pci_unregister_driver(&cirrus_pci_driver);
|
|
}
|
|
|
|
module_init(cirrus_init);
|
|
module_exit(cirrus_exit);
|
|
|
|
MODULE_DEVICE_TABLE(pci, pciidlist);
|
|
MODULE_LICENSE("GPL");
|