OpenCloudOS-Kernel/drivers/gpu
Imre Deak 75e39688f3 drm/i915/ddi: Use power well CTL IDX instead of ID
Similarly to the previous patch use a separate request/status HW flag
index defined right after the corresponding control registers instead of
depending for this on the power well IDs. Since the set of
control/status registers varies among the different power wells (on a
single platform), also add a new i915_power_well_registers struct that
we populate and assign to each DDI power well as needed.

Also clarify a bit the code comment describing the function and layout
of the control registers.

This also fixes a problem on ICL, where we incorrectly read the KVMR
control register in hsw_power_well_requesters() even for DDI and AUX
power wells.

v2:
- Clarify platform range tags in code comments. (Paulo)
- Fix line over 80 chars checkpatch warning.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180806095843.13294-7-imre.deak@intel.com
2018-08-08 13:51:19 +03:00
..
drm drm/i915/ddi: Use power well CTL IDX instead of ID 2018-08-08 13:51:19 +03:00
host1x drm for v4.18-rc1 2018-06-06 08:16:33 -07:00
ipu-v3 gpu: ipu-v3: prg: avoid possible array underflow 2018-03-15 17:52:08 +01:00
vga docs: Fix some broken references 2018-06-15 18:10:01 -03:00
Makefile