Matthew Gerlach ae23f746d7 fpga: dfl: Allow Port to be linked to FME's DFL ... Currently we use PORTn_OFFSET to locate PORT DFLs, and PORT DFLs are not connected FME DFL. But for some cases (e.g. Intel Open FPGA Stack device), PORT DFLs are connected to FME DFL directly, so we don't need to search PORT DFLs via PORTn_OFFSET again. If BAR value of PORTn_OFFSET is 0x7 (FME_PORT_OFST_BAR_SKIP) then driver will skip searching the DFL for that port. If BAR value is invalid, return -EINVAL. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Acked-by: Wu Hao <hao.wu@intel.com> Link: https://lore.kernel.org/r/20220505100617.703672-1-tianfei.zhang@intel.com Signed-off-by: Xu Yilun <yilun.xu@intel.com>		2022-05-10 16:05:38 +08:00
..
Kconfig	FPGA Manager changes for 5.15-rc1	2021-08-05 14:26:03 +02:00
Makefile	fpga: Use tab instead of space indentation	2022-05-10 16:04:50 +08:00
altera-cvp.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
altera-fpga2sdram.c	fpga: bridge: Use standard dev_release for class driver	2021-11-28 14:02:13 -08:00
altera-freeze-bridge.c	fpga: bridge: Use standard dev_release for class driver	2021-11-28 14:02:13 -08:00
altera-hps2fpga.c	fpga: bridge: Use standard dev_release for class driver	2021-11-28 14:02:13 -08:00
altera-pr-ip-core-plat.c	fpga: fpga-mgr: altera-pr-ip: Simplify registration	2020-12-01 18:49:32 +01:00
altera-pr-ip-core.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
altera-ps-spi.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
dfl-afu-dma-region.c	fpga: dfl: afu: convert get_user_pages() --> pin_user_pages()	2020-06-18 18:12:06 -07:00
dfl-afu-error.c	fpga: dfl: afu: harden port enable logic	2021-03-24 11:15:04 -07:00
dfl-afu-main.c	fpga: dfl: afu: harden port enable logic	2021-03-24 11:15:04 -07:00
dfl-afu-region.c	fpga: dfl: afu: add afu sub feature support	2018-07-15 13:55:47 +02:00
dfl-afu.h	fpga: dfl: afu: harden port enable logic	2021-03-24 11:15:04 -07:00
dfl-fme-br.c	fpga: bridge: Use standard dev_release for class driver	2021-11-28 14:02:13 -08:00
dfl-fme-error.c	fpga: dfl: fme: add interrupt support for global error reporting	2020-07-06 21:35:42 -07:00
dfl-fme-main.c	fpga: dfl: fme: add interrupt support for global error reporting	2020-07-06 21:35:42 -07:00
dfl-fme-mgr.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
dfl-fme-perf.c	fpga: dfl: fme: Fix cpu hotplug issue in performance reporting	2021-07-27 11:05:16 -07:00
dfl-fme-pr.c	fpga: fix spelling mistakes	2021-07-21 19:54:21 -07:00
dfl-fme-pr.h	fpga: dfl: fme: add partial reconfiguration sub feature support	2018-07-15 13:55:46 +02:00
dfl-fme-region.c	fpga: region: Use standard dev_release for class driver	2021-11-28 14:02:41 -08:00
dfl-fme.h	fpga: dfl: fme: add performance reporting support	2020-04-28 15:49:28 +02:00
dfl-n3000-nios.c	fpga: fix spelling mistakes	2021-07-21 19:54:21 -07:00
dfl-pci.c	fpga: dfl: Allow Port to be linked to FME's DFL	2022-05-10 16:05:38 +08:00
dfl.c	fpga: dfl: check feature type before parse irq info	2022-05-10 16:05:15 +08:00
dfl.h	fpga: dfl: Allow Port to be linked to FME's DFL	2022-05-10 16:05:38 +08:00
fpga-bridge.c	fpga: bridge: Use standard dev_release for class driver	2021-11-28 14:02:13 -08:00
fpga-mgr.c	fpga: fpga-mgr: fix kernel-doc warnings	2022-05-10 16:04:11 +08:00
fpga-region.c	fpga: fix for coding style issues	2022-05-10 16:03:52 +08:00
ice40-spi.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
machxo2-spi.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
of-fpga-region.c	fpga: fpga-region: fix kernel-doc formatting issues	2022-05-10 16:05:00 +08:00
socfpga-a10.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
socfpga.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
stratix10-soc.c	fpga: stratix10-soc: Do not use ret uninitialized in s10_probe()	2021-12-02 20:07:17 -08:00
ts73xx-fpga.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
versal-fpga.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
xilinx-pr-decoupler.c	fpga: bridge: Use standard dev_release for class driver	2021-11-28 14:02:13 -08:00
xilinx-spi.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
zynq-fpga.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00
zynqmp-fpga.c	fpga: mgr: Use standard dev_release for class driver	2021-11-28 13:59:13 -08:00