bf50c92b5c
Upstream commit: a130066f74008858ac425b7497d231742474a0ea Conflict: none Drop non-PA bits when getting GFN for guest's PGD with the maximum theoretical mask for guest MAXPHYADDR. Do it unconditionally because it's harmless for 32-bit guests, querying 64-bit mode would be more expensive, and for EPT the mask isn't tied to guest mode. Using PT_BASE_ADDR_MASK would be technically wrong (PAE paging has 64-bit elements _except_ for CR3, which has only 32 valid bits), it wouldn't matter in practice though. Opportunistically use GENMASK_ULL() to define __PT_BASE_ADDR_MASK. Intel-SIG: commit a130066f7400 KVM: x86/mmu: Drop non-PA bits when getting GFN for guest's PGD Backport KVM Linear Address Masking (LAM) support. Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com> Tested-by: Xuelian Guo <xuelian.guo@intel.com> Link: https://lore.kernel.org/r/20230913124227.12574-6-binbin.wu@linux.intel.com Signed-off-by: Sean Christopherson <seanjc@google.com> [ Zhiquan Li: amend commit log ] Signed-off-by: Zhiquan Li <zhiquan1.li@intel.com> |
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| .. | ||
| mmu.c | ||
| mmu_internal.h | ||
| mmutrace.h | ||
| page_track.c | ||
| page_track.h | ||
| paging_tmpl.h | ||
| spte.c | ||
| spte.h | ||
| tdp_iter.c | ||
| tdp_iter.h | ||
| tdp_mmu.c | ||
| tdp_mmu.h | ||