946d48f1ae
commit 8e02c3b782ec64343f3cccc8dc5a8be2b379e80b upstream. Currently, only TLB-based ioremap() support writecombine, so add the counterpart for DMW-based ioremap() with help of DMW2. The base address (WRITECOMBINE_BASE) is configured as 0xa000000000000000. DMW3 is unused by kernel now, however firmware may leave garbage in them and interfere kernel's address mapping. So clear it as necessary. BTW, centralize the DMW configuration to macro SETUP_DMWINS. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: gaojuxin <gaojuxin@loongson.cn> Signed-off-by: Ming Wang <wangming01@loongson.cn> |
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| Makefile | ||
| hibernate.c | ||
| hibernate_asm.S | ||
| platform.c | ||
| suspend.c | ||
| suspend_asm.S | ||