269 lines
6.6 KiB
C
269 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PolarFire SoC (MPFS) MUSB Glue Layer
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*
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* Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
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* Based on {omap2430,tusb6010,ux500}.c
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*
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*/
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/usb/usb_phy_generic.h>
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#include "musb_core.h"
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#include "musb_dma.h"
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#define MPFS_MUSB_MAX_EP_NUM 8
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#define MPFS_MUSB_RAM_BITS 12
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struct mpfs_glue {
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struct device *dev;
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struct platform_device *musb;
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struct platform_device *phy;
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struct clk *clk;
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};
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static struct musb_fifo_cfg mpfs_musb_mode_cfg[] = {
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{ .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 1024, },
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{ .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 4096, },
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};
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static const struct musb_hdrc_config mpfs_musb_hdrc_config = {
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.fifo_cfg = mpfs_musb_mode_cfg,
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.fifo_cfg_size = ARRAY_SIZE(mpfs_musb_mode_cfg),
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.multipoint = true,
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.dyn_fifo = true,
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.num_eps = MPFS_MUSB_MAX_EP_NUM,
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.ram_bits = MPFS_MUSB_RAM_BITS,
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};
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static irqreturn_t mpfs_musb_interrupt(int irq, void *__hci)
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{
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unsigned long flags;
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irqreturn_t ret = IRQ_NONE;
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struct musb *musb = __hci;
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spin_lock_irqsave(&musb->lock, flags);
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musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
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musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
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musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
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if (musb->int_usb || musb->int_tx || musb->int_rx) {
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musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
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musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
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musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
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ret = musb_interrupt(musb);
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}
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spin_unlock_irqrestore(&musb->lock, flags);
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return ret;
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}
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static void mpfs_musb_set_vbus(struct musb *musb, int is_on)
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{
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u8 devctl;
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/*
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* HDRC controls CPEN, but beware current surges during device
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* connect. They can trigger transient overcurrent conditions
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* that must be ignored.
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*/
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devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
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if (is_on) {
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musb->is_active = 1;
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musb->xceiv->otg->default_a = 1;
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
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devctl |= MUSB_DEVCTL_SESSION;
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MUSB_HST_MODE(musb);
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} else {
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musb->is_active = 0;
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/*
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* NOTE: skipping A_WAIT_VFALL -> A_IDLE and
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* jumping right to B_IDLE...
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*/
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musb->xceiv->otg->default_a = 0;
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musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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devctl &= ~MUSB_DEVCTL_SESSION;
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MUSB_DEV_MODE(musb);
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}
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musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
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dev_dbg(musb->controller, "VBUS %s, devctl %02x\n",
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usb_otg_state_string(musb->xceiv->otg->state),
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musb_readb(musb->mregs, MUSB_DEVCTL));
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}
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static int mpfs_musb_init(struct musb *musb)
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{
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struct device *dev = musb->controller;
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musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
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if (IS_ERR(musb->xceiv)) {
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dev_err(dev, "HS UDC: no transceiver configured\n");
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return PTR_ERR(musb->xceiv);
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}
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musb->dyn_fifo = true;
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musb->isr = mpfs_musb_interrupt;
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musb_platform_set_vbus(musb, 1);
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return 0;
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}
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static const struct musb_platform_ops mpfs_ops = {
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.quirks = MUSB_DMA_INVENTRA,
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.init = mpfs_musb_init,
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.fifo_mode = 2,
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#ifdef CONFIG_USB_INVENTRA_DMA
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.dma_init = musbhs_dma_controller_create,
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.dma_exit = musbhs_dma_controller_destroy,
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#endif
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.set_vbus = mpfs_musb_set_vbus
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};
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static int mpfs_probe(struct platform_device *pdev)
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{
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struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct mpfs_glue *glue;
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struct platform_device *musb_pdev;
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struct device *dev = &pdev->dev;
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struct clk *clk;
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int ret;
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glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
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if (!glue)
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return -ENOMEM;
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musb_pdev = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
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if (!musb_pdev) {
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dev_err(dev, "failed to allocate musb device\n");
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return -ENOMEM;
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}
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clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "failed to get clock\n");
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ret = PTR_ERR(clk);
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goto err_phy_release;
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}
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ret = clk_prepare_enable(clk);
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if (ret) {
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dev_err(&pdev->dev, "failed to enable clock\n");
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goto err_phy_release;
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}
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musb_pdev->dev.parent = dev;
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musb_pdev->dev.coherent_dma_mask = DMA_BIT_MASK(39);
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musb_pdev->dev.dma_mask = &musb_pdev->dev.coherent_dma_mask;
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device_set_of_node_from_dev(&musb_pdev->dev, dev);
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glue->dev = dev;
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glue->musb = musb_pdev;
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glue->clk = clk;
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pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata) {
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ret = -ENOMEM;
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goto err_clk_disable;
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}
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pdata->config = &mpfs_musb_hdrc_config;
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pdata->platform_ops = &mpfs_ops;
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pdata->mode = usb_get_dr_mode(dev);
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if (pdata->mode == USB_DR_MODE_UNKNOWN) {
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dev_info(dev, "No dr_mode property found, defaulting to otg\n");
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pdata->mode = USB_DR_MODE_OTG;
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}
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glue->phy = usb_phy_generic_register();
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if (IS_ERR(glue->phy)) {
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dev_err(dev, "failed to register usb-phy %ld\n",
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PTR_ERR(glue->phy));
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ret = PTR_ERR(glue->phy);
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goto err_clk_disable;
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}
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platform_set_drvdata(pdev, glue);
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ret = platform_device_add_resources(musb_pdev, pdev->resource, pdev->num_resources);
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if (ret) {
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dev_err(dev, "failed to add resources\n");
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goto err_clk_disable;
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}
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ret = platform_device_add_data(musb_pdev, pdata, sizeof(*pdata));
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if (ret) {
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dev_err(dev, "failed to add platform_data\n");
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goto err_clk_disable;
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}
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ret = platform_device_add(musb_pdev);
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if (ret) {
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dev_err(dev, "failed to register musb device\n");
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goto err_clk_disable;
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}
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dev_info(&pdev->dev, "Registered MPFS MUSB driver\n");
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return 0;
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err_clk_disable:
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clk_disable_unprepare(clk);
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err_phy_release:
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usb_phy_generic_unregister(glue->phy);
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platform_device_put(musb_pdev);
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return ret;
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}
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static void mpfs_remove(struct platform_device *pdev)
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{
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struct mpfs_glue *glue = platform_get_drvdata(pdev);
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clk_disable_unprepare(glue->clk);
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platform_device_unregister(glue->musb);
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usb_phy_generic_unregister(pdev);
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}
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#ifdef CONFIG_OF
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static const struct of_device_id mpfs_id_table[] = {
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{ .compatible = "microchip,mpfs-musb" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, mpfs_id_table);
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#endif
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static struct platform_driver mpfs_musb_driver = {
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.probe = mpfs_probe,
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.remove_new = mpfs_remove,
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.driver = {
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.name = "mpfs-musb",
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.of_match_table = of_match_ptr(mpfs_id_table)
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},
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};
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module_platform_driver(mpfs_musb_driver);
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MODULE_DESCRIPTION("PolarFire SoC MUSB Glue Layer");
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MODULE_LICENSE("GPL");
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