365 lines
9.5 KiB
C
365 lines
9.5 KiB
C
/**************************************************************************
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* Copyright (c) 2007-2011, Intel Corporation.
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* All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
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* develop this driver.
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*
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**************************************************************************/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/tty.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <drm/drmP.h>
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#include <drm/drm.h>
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#include <drm/drm_crtc.h>
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#include "psb_drv.h"
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#include "psb_reg.h"
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#include "framebuffer.h"
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/**
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* psb_spank - reset the 2D engine
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* @dev_priv: our PSB DRM device
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*
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* Soft reset the graphics engine and then reload the necessary registers.
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* We use this at initialisation time but it will become relevant for
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* accelerated X later
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*/
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void psb_spank(struct drm_psb_private *dev_priv)
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{
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PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
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_PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
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_PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
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_PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
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PSB_RSGX32(PSB_CR_SOFT_RESET);
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msleep(1);
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PSB_WSGX32(0, PSB_CR_SOFT_RESET);
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wmb();
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PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
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PSB_CR_BIF_CTRL);
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wmb();
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(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
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msleep(1);
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PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
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PSB_CR_BIF_CTRL);
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(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
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PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
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}
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/**
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* psb2_2d_wait_available - wait for FIFO room
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* @dev_priv: our DRM device
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* @size: size (in dwords) of the command we want to issue
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*
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* Wait until there is room to load the FIFO with our data. If the
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* device is not responding then reset it
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*/
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static int psb_2d_wait_available(struct drm_psb_private *dev_priv,
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unsigned size)
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{
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uint32_t avail = PSB_RSGX32(PSB_CR_2D_SOCIF);
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unsigned long t = jiffies + HZ;
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while (avail < size) {
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avail = PSB_RSGX32(PSB_CR_2D_SOCIF);
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if (time_after(jiffies, t)) {
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psb_spank(dev_priv);
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return -EIO;
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}
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}
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return 0;
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}
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/**
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* psb_2d_submit - submit a 2D command
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* @dev_priv: our DRM device
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* @cmdbuf: command to issue
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* @size: length (in dwords)
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*
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* Issue one or more 2D commands to the accelerator. This needs to be
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* serialized later when we add the GEM interfaces for acceleration
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*/
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static int psbfb_2d_submit(struct drm_psb_private *dev_priv, uint32_t *cmdbuf,
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unsigned size)
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{
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int ret = 0;
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int i;
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unsigned submit_size;
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unsigned long flags;
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spin_lock_irqsave(&dev_priv->lock_2d, flags);
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while (size > 0) {
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submit_size = (size < 0x60) ? size : 0x60;
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size -= submit_size;
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ret = psb_2d_wait_available(dev_priv, submit_size);
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if (ret)
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break;
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submit_size <<= 2;
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for (i = 0; i < submit_size; i += 4)
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PSB_WSGX32(*cmdbuf++, PSB_SGX_2D_SLAVE_PORT + i);
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(void)PSB_RSGX32(PSB_SGX_2D_SLAVE_PORT + i - 4);
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}
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spin_unlock_irqrestore(&dev_priv->lock_2d, flags);
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return ret;
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}
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/**
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* psb_accel_2d_copy_direction - compute blit order
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* @xdir: X direction of move
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* @ydir: Y direction of move
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*
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* Compute the correct order setings to ensure that an overlapping blit
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* correctly copies all the pixels.
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*/
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static u32 psb_accel_2d_copy_direction(int xdir, int ydir)
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{
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if (xdir < 0)
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return (ydir < 0) ? PSB_2D_COPYORDER_BR2TL :
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PSB_2D_COPYORDER_TR2BL;
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else
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return (ydir < 0) ? PSB_2D_COPYORDER_BL2TR :
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PSB_2D_COPYORDER_TL2BR;
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}
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/**
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* psb_accel_2d_copy - accelerated 2D copy
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* @dev_priv: our DRM device
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* @src_offset in bytes
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* @src_stride in bytes
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* @src_format psb 2D format defines
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* @dst_offset in bytes
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* @dst_stride in bytes
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* @dst_format psb 2D format defines
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* @src_x offset in pixels
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* @src_y offset in pixels
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* @dst_x offset in pixels
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* @dst_y offset in pixels
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* @size_x of the copied area
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* @size_y of the copied area
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*
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* Format and issue a 2D accelerated copy command.
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*/
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static int psb_accel_2d_copy(struct drm_psb_private *dev_priv,
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uint32_t src_offset, uint32_t src_stride,
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uint32_t src_format, uint32_t dst_offset,
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uint32_t dst_stride, uint32_t dst_format,
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uint16_t src_x, uint16_t src_y,
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uint16_t dst_x, uint16_t dst_y,
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uint16_t size_x, uint16_t size_y)
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{
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uint32_t blit_cmd;
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uint32_t buffer[10];
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uint32_t *buf;
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uint32_t direction;
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buf = buffer;
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direction =
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psb_accel_2d_copy_direction(src_x - dst_x, src_y - dst_y);
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if (direction == PSB_2D_COPYORDER_BR2TL ||
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direction == PSB_2D_COPYORDER_TR2BL) {
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src_x += size_x - 1;
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dst_x += size_x - 1;
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}
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if (direction == PSB_2D_COPYORDER_BR2TL ||
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direction == PSB_2D_COPYORDER_BL2TR) {
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src_y += size_y - 1;
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dst_y += size_y - 1;
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}
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blit_cmd =
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PSB_2D_BLIT_BH |
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PSB_2D_ROT_NONE |
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PSB_2D_DSTCK_DISABLE |
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PSB_2D_SRCCK_DISABLE |
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PSB_2D_USE_PAT | PSB_2D_ROP3_SRCCOPY | direction;
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*buf++ = PSB_2D_FENCE_BH;
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*buf++ =
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PSB_2D_DST_SURF_BH | dst_format | (dst_stride <<
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PSB_2D_DST_STRIDE_SHIFT);
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*buf++ = dst_offset;
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*buf++ =
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PSB_2D_SRC_SURF_BH | src_format | (src_stride <<
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PSB_2D_SRC_STRIDE_SHIFT);
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*buf++ = src_offset;
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*buf++ =
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PSB_2D_SRC_OFF_BH | (src_x << PSB_2D_SRCOFF_XSTART_SHIFT) |
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(src_y << PSB_2D_SRCOFF_YSTART_SHIFT);
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*buf++ = blit_cmd;
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*buf++ =
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(dst_x << PSB_2D_DST_XSTART_SHIFT) | (dst_y <<
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PSB_2D_DST_YSTART_SHIFT);
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*buf++ =
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(size_x << PSB_2D_DST_XSIZE_SHIFT) | (size_y <<
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PSB_2D_DST_YSIZE_SHIFT);
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*buf++ = PSB_2D_FLUSH_BH;
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return psbfb_2d_submit(dev_priv, buffer, buf - buffer);
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}
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/**
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* psbfb_copyarea_accel - copyarea acceleration for /dev/fb
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* @info: our framebuffer
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* @a: copyarea parameters from the framebuffer core
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*
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* Perform a 2D copy via the accelerator
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*/
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static void psbfb_copyarea_accel(struct fb_info *info,
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const struct fb_copyarea *a)
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{
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struct psb_fbdev *fbdev = info->par;
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struct psb_framebuffer *psbfb = &fbdev->pfb;
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struct drm_device *dev = psbfb->base.dev;
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struct drm_framebuffer *fb = fbdev->psb_fb_helper.fb;
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struct drm_psb_private *dev_priv = dev->dev_private;
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uint32_t offset;
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uint32_t stride;
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uint32_t src_format;
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uint32_t dst_format;
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if (!fb)
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return;
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offset = psbfb->gtt->offset;
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stride = fb->pitches[0];
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switch (fb->depth) {
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case 8:
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src_format = PSB_2D_SRC_332RGB;
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dst_format = PSB_2D_DST_332RGB;
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break;
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case 15:
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src_format = PSB_2D_SRC_555RGB;
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dst_format = PSB_2D_DST_555RGB;
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break;
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case 16:
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src_format = PSB_2D_SRC_565RGB;
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dst_format = PSB_2D_DST_565RGB;
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break;
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case 24:
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case 32:
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/* this is wrong but since we don't do blending its okay */
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src_format = PSB_2D_SRC_8888ARGB;
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dst_format = PSB_2D_DST_8888ARGB;
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break;
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default:
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/* software fallback */
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cfb_copyarea(info, a);
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return;
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}
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if (!gma_power_begin(dev, false)) {
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cfb_copyarea(info, a);
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return;
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}
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psb_accel_2d_copy(dev_priv,
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offset, stride, src_format,
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offset, stride, dst_format,
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a->sx, a->sy, a->dx, a->dy, a->width, a->height);
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gma_power_end(dev);
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}
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/**
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* psbfb_copyarea - 2D copy interface
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* @info: our framebuffer
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* @region: region to copy
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*
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* Copy an area of the framebuffer console either by the accelerator
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* or directly using the cfb helpers according to the request
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*/
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void psbfb_copyarea(struct fb_info *info,
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const struct fb_copyarea *region)
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{
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if (unlikely(info->state != FBINFO_STATE_RUNNING))
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return;
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/* Avoid the 8 pixel erratum */
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if (region->width == 8 || region->height == 8 ||
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(info->flags & FBINFO_HWACCEL_DISABLED))
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return cfb_copyarea(info, region);
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psbfb_copyarea_accel(info, region);
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}
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/**
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* psbfb_sync - synchronize 2D
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* @info: our framebuffer
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*
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* Wait for the 2D engine to quiesce so that we can do CPU
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* access to the framebuffer again
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*/
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int psbfb_sync(struct fb_info *info)
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{
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struct psb_fbdev *fbdev = info->par;
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struct psb_framebuffer *psbfb = &fbdev->pfb;
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struct drm_device *dev = psbfb->base.dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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unsigned long _end = jiffies + DRM_HZ;
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int busy = 0;
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unsigned long flags;
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spin_lock_irqsave(&dev_priv->lock_2d, flags);
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/*
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* First idle the 2D engine.
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*/
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if ((PSB_RSGX32(PSB_CR_2D_SOCIF) == _PSB_C2_SOCIF_EMPTY) &&
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((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) & _PSB_C2B_STATUS_BUSY) == 0))
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goto out;
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do {
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busy = (PSB_RSGX32(PSB_CR_2D_SOCIF) != _PSB_C2_SOCIF_EMPTY);
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cpu_relax();
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} while (busy && !time_after_eq(jiffies, _end));
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if (busy)
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busy = (PSB_RSGX32(PSB_CR_2D_SOCIF) != _PSB_C2_SOCIF_EMPTY);
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if (busy)
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goto out;
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do {
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busy = ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) &
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_PSB_C2B_STATUS_BUSY) != 0);
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cpu_relax();
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} while (busy && !time_after_eq(jiffies, _end));
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if (busy)
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busy = ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) &
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_PSB_C2B_STATUS_BUSY) != 0);
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out:
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spin_unlock_irqrestore(&dev_priv->lock_2d, flags);
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return (busy) ? -EBUSY : 0;
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}
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