142 lines
3.5 KiB
C
142 lines
3.5 KiB
C
/*
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* Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MLX5_IB_USER_H
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#define MLX5_IB_USER_H
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#include <linux/types.h>
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enum {
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MLX5_QP_FLAG_SIGNATURE = 1 << 0,
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MLX5_QP_FLAG_SCATTER_CQE = 1 << 1,
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};
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enum {
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MLX5_SRQ_FLAG_SIGNATURE = 1 << 0,
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};
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/* Increment this value if any changes that break userspace ABI
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* compatibility are made.
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*/
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#define MLX5_IB_UVERBS_ABI_VERSION 1
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/* Make sure that all structs defined in this file remain laid out so
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* that they pack the same way on 32-bit and 64-bit architectures (to
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* avoid incompatibility between 32-bit userspace and 64-bit kernels).
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* In particular do not use pointer types -- pass pointers in __u64
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* instead.
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*/
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struct mlx5_ib_alloc_ucontext_req {
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__u32 total_num_uuars;
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__u32 num_low_latency_uuars;
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};
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struct mlx5_ib_alloc_ucontext_req_v2 {
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__u32 total_num_uuars;
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__u32 num_low_latency_uuars;
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__u32 flags;
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__u32 comp_mask;
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};
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enum mlx5_ib_alloc_ucontext_resp_mask {
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MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
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};
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struct mlx5_ib_alloc_ucontext_resp {
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__u32 qp_tab_size;
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__u32 bf_reg_size;
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__u32 tot_uuars;
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__u32 cache_line_size;
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__u16 max_sq_desc_sz;
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__u16 max_rq_desc_sz;
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__u32 max_send_wqebb;
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__u32 max_recv_wr;
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__u32 max_srq_recv_wr;
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__u16 num_ports;
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__u16 reserved1;
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__u32 comp_mask;
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__u32 response_length;
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__u32 reserved2;
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__u64 hca_core_clock_offset;
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};
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struct mlx5_ib_alloc_pd_resp {
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__u32 pdn;
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};
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struct mlx5_ib_create_cq {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 cqe_size;
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__u32 reserved; /* explicit padding (optional on i386) */
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};
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struct mlx5_ib_create_cq_resp {
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__u32 cqn;
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__u32 reserved;
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};
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struct mlx5_ib_resize_cq {
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__u64 buf_addr;
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__u16 cqe_size;
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__u16 reserved0;
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__u32 reserved1;
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};
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struct mlx5_ib_create_srq {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 flags;
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__u32 reserved; /* explicit padding (optional on i386) */
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};
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struct mlx5_ib_create_srq_resp {
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__u32 srqn;
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__u32 reserved;
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};
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struct mlx5_ib_create_qp {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 sq_wqe_count;
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__u32 rq_wqe_count;
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__u32 rq_wqe_shift;
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__u32 flags;
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};
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struct mlx5_ib_create_qp_resp {
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__u32 uuar_index;
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};
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#endif /* MLX5_IB_USER_H */
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