421 lines
10 KiB
C
421 lines
10 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) 2012 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#define pr_fmt(fmt) "CPU PMU: " fmt
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#include <linux/bitmap.h>
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/irq.h>
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#include <linux/irqdesc.h>
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#include <asm/cputype.h>
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#include <asm/irq_regs.h>
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#include <asm/pmu.h>
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/* Set at runtime when we know what CPU type we are. */
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static struct arm_pmu *cpu_pmu;
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/*
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* Despite the names, these two functions are CPU-specific and are used
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* by the OProfile/perf code.
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*/
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const char *perf_pmu_name(void)
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{
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if (!cpu_pmu)
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return NULL;
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return cpu_pmu->name;
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}
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EXPORT_SYMBOL_GPL(perf_pmu_name);
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int perf_num_counters(void)
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{
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int max_events = 0;
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if (cpu_pmu != NULL)
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max_events = cpu_pmu->num_events;
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return max_events;
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}
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EXPORT_SYMBOL_GPL(perf_num_counters);
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/* Include the PMU-specific implementations. */
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#include "perf_event_xscale.c"
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#include "perf_event_v6.c"
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#include "perf_event_v7.c"
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static void cpu_pmu_enable_percpu_irq(void *data)
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{
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int irq = *(int *)data;
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enable_percpu_irq(irq, IRQ_TYPE_NONE);
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}
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static void cpu_pmu_disable_percpu_irq(void *data)
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{
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int irq = *(int *)data;
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disable_percpu_irq(irq);
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}
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static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
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{
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int i, irq, irqs;
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struct platform_device *pmu_device = cpu_pmu->plat_device;
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struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
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irqs = min(pmu_device->num_resources, num_possible_cpus());
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irq = platform_get_irq(pmu_device, 0);
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if (irq >= 0 && irq_is_percpu(irq)) {
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on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
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free_percpu_irq(irq, &hw_events->percpu_pmu);
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} else {
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for (i = 0; i < irqs; ++i) {
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int cpu = i;
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if (cpu_pmu->irq_affinity)
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cpu = cpu_pmu->irq_affinity[i];
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if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
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continue;
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irq = platform_get_irq(pmu_device, i);
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if (irq >= 0)
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free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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}
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}
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}
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static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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{
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int i, err, irq, irqs;
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struct platform_device *pmu_device = cpu_pmu->plat_device;
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struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
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if (!pmu_device)
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return -ENODEV;
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irqs = min(pmu_device->num_resources, num_possible_cpus());
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if (irqs < 1) {
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pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
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return 0;
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}
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irq = platform_get_irq(pmu_device, 0);
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if (irq >= 0 && irq_is_percpu(irq)) {
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err = request_percpu_irq(irq, handler, "arm-pmu",
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&hw_events->percpu_pmu);
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if (err) {
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pr_err("unable to request IRQ%d for ARM PMU counters\n",
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irq);
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return err;
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}
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on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
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} else {
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for (i = 0; i < irqs; ++i) {
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int cpu = i;
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err = 0;
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irq = platform_get_irq(pmu_device, i);
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if (irq < 0)
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continue;
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if (cpu_pmu->irq_affinity)
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cpu = cpu_pmu->irq_affinity[i];
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/*
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* If we have a single PMU interrupt that we can't shift,
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* assume that we're running on a uniprocessor machine and
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* continue. Otherwise, continue without this interrupt.
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*/
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if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
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pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
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irq, cpu);
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continue;
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}
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err = request_irq(irq, handler,
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IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
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per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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if (err) {
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pr_err("unable to request IRQ%d for ARM PMU counters\n",
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irq);
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return err;
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}
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cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
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}
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}
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return 0;
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}
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/*
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* PMU hardware loses all context when a CPU goes offline.
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* When a CPU is hotplugged back in, since some hardware registers are
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* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
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* junk values out of them.
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*/
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static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
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void *hcpu)
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{
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struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);
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if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
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return NOTIFY_DONE;
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if (pmu->reset)
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pmu->reset(pmu);
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else
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return NOTIFY_DONE;
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return NOTIFY_OK;
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}
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static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
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{
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int err;
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int cpu;
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struct pmu_hw_events __percpu *cpu_hw_events;
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cpu_hw_events = alloc_percpu(struct pmu_hw_events);
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if (!cpu_hw_events)
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return -ENOMEM;
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cpu_pmu->hotplug_nb.notifier_call = cpu_pmu_notify;
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err = register_cpu_notifier(&cpu_pmu->hotplug_nb);
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if (err)
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goto out_hw_events;
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for_each_possible_cpu(cpu) {
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struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu);
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raw_spin_lock_init(&events->pmu_lock);
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events->percpu_pmu = cpu_pmu;
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}
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cpu_pmu->hw_events = cpu_hw_events;
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cpu_pmu->request_irq = cpu_pmu_request_irq;
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cpu_pmu->free_irq = cpu_pmu_free_irq;
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/* Ensure the PMU has sane values out of reset. */
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if (cpu_pmu->reset)
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on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
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/* If no interrupts available, set the corresponding capability flag */
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if (!platform_get_irq(cpu_pmu->plat_device, 0))
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cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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return 0;
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out_hw_events:
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free_percpu(cpu_hw_events);
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return err;
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}
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static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
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{
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unregister_cpu_notifier(&cpu_pmu->hotplug_nb);
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free_percpu(cpu_pmu->hw_events);
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}
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/*
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* PMU platform driver and devicetree bindings.
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*/
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static const struct of_device_id cpu_pmu_of_device_ids[] = {
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{.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
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{.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
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{.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
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{.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
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{.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
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{.compatible = "arm,cortex-a7-pmu", .data = armv7_a7_pmu_init},
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{.compatible = "arm,cortex-a5-pmu", .data = armv7_a5_pmu_init},
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{.compatible = "arm,arm11mpcore-pmu", .data = armv6mpcore_pmu_init},
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{.compatible = "arm,arm1176-pmu", .data = armv6_1176_pmu_init},
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{.compatible = "arm,arm1136-pmu", .data = armv6_1136_pmu_init},
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{.compatible = "qcom,krait-pmu", .data = krait_pmu_init},
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{.compatible = "qcom,scorpion-pmu", .data = scorpion_pmu_init},
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{.compatible = "qcom,scorpion-mp-pmu", .data = scorpion_mp_pmu_init},
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{},
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};
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static struct platform_device_id cpu_pmu_plat_device_ids[] = {
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{.name = "arm-pmu"},
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{.name = "armv6-pmu"},
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{.name = "armv7-pmu"},
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{.name = "xscale-pmu"},
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{},
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};
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static const struct pmu_probe_info pmu_probe_table[] = {
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ARM_PMU_PROBE(ARM_CPU_PART_ARM1136, armv6_1136_pmu_init),
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ARM_PMU_PROBE(ARM_CPU_PART_ARM1156, armv6_1156_pmu_init),
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ARM_PMU_PROBE(ARM_CPU_PART_ARM1176, armv6_1176_pmu_init),
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ARM_PMU_PROBE(ARM_CPU_PART_ARM11MPCORE, armv6mpcore_pmu_init),
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ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A8, armv7_a8_pmu_init),
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ARM_PMU_PROBE(ARM_CPU_PART_CORTEX_A9, armv7_a9_pmu_init),
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XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V1, xscale1pmu_init),
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XSCALE_PMU_PROBE(ARM_CPU_XSCALE_ARCH_V2, xscale2pmu_init),
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{ /* sentinel value */ }
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};
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/*
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* CPU PMU identification and probing.
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*/
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static int probe_current_pmu(struct arm_pmu *pmu)
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{
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int cpu = get_cpu();
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unsigned int cpuid = read_cpuid_id();
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int ret = -ENODEV;
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const struct pmu_probe_info *info;
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pr_info("probing PMU on CPU %d\n", cpu);
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for (info = pmu_probe_table; info->init != NULL; info++) {
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if ((cpuid & info->mask) != info->cpuid)
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continue;
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ret = info->init(pmu);
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break;
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}
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put_cpu();
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return ret;
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}
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static int of_pmu_irq_cfg(struct platform_device *pdev)
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{
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int i, irq;
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int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
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if (!irqs)
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return -ENOMEM;
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/* Don't bother with PPIs; they're already affine */
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irq = platform_get_irq(pdev, 0);
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if (irq >= 0 && irq_is_percpu(irq))
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return 0;
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for (i = 0; i < pdev->num_resources; ++i) {
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struct device_node *dn;
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int cpu;
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dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity",
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i);
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if (!dn) {
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pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
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of_node_full_name(pdev->dev.of_node), i);
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break;
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}
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for_each_possible_cpu(cpu)
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if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))
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break;
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of_node_put(dn);
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if (cpu >= nr_cpu_ids) {
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pr_warn("Failed to find logical CPU for %s\n",
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dn->name);
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break;
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}
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irqs[i] = cpu;
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}
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if (i == pdev->num_resources)
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cpu_pmu->irq_affinity = irqs;
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else
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kfree(irqs);
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return 0;
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}
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static int cpu_pmu_device_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id;
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const int (*init_fn)(struct arm_pmu *);
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struct device_node *node = pdev->dev.of_node;
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struct arm_pmu *pmu;
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int ret = -ENODEV;
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if (cpu_pmu) {
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pr_info("attempt to register multiple PMU devices!\n");
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return -ENOSPC;
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}
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pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
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if (!pmu) {
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pr_info("failed to allocate PMU device!\n");
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return -ENOMEM;
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}
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cpu_pmu = pmu;
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cpu_pmu->plat_device = pdev;
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if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
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init_fn = of_id->data;
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ret = of_pmu_irq_cfg(pdev);
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if (!ret)
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ret = init_fn(pmu);
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} else {
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ret = probe_current_pmu(pmu);
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}
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if (ret) {
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pr_info("failed to probe PMU!\n");
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goto out_free;
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}
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ret = cpu_pmu_init(cpu_pmu);
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if (ret)
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goto out_free;
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ret = armpmu_register(cpu_pmu, -1);
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if (ret)
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goto out_destroy;
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return 0;
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out_destroy:
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cpu_pmu_destroy(cpu_pmu);
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out_free:
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pr_info("failed to register PMU devices!\n");
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kfree(pmu);
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return ret;
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}
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static struct platform_driver cpu_pmu_driver = {
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.driver = {
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.name = "arm-pmu",
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.pm = &armpmu_dev_pm_ops,
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.of_match_table = cpu_pmu_of_device_ids,
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},
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.probe = cpu_pmu_device_probe,
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.id_table = cpu_pmu_plat_device_ids,
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};
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static int __init register_pmu_driver(void)
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{
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return platform_driver_register(&cpu_pmu_driver);
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}
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device_initcall(register_pmu_driver);
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