217 lines
5.2 KiB
C
217 lines
5.2 KiB
C
/*
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* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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* JZ4740 platform PWM support
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <asm/mach-jz4740/timer.h>
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#define NUM_PWM 8
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struct jz4740_pwm_chip {
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struct pwm_chip chip;
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struct clk *clk;
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};
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static inline struct jz4740_pwm_chip *to_jz4740(struct pwm_chip *chip)
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{
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return container_of(chip, struct jz4740_pwm_chip, chip);
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}
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static int jz4740_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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/*
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* Timers 0 and 1 are used for system tasks, so they are unavailable
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* for use as PWMs.
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*/
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if (pwm->hwpwm < 2)
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return -EBUSY;
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jz4740_timer_start(pwm->hwpwm);
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return 0;
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}
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static void jz4740_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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jz4740_timer_set_ctrl(pwm->hwpwm, 0);
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jz4740_timer_stop(pwm->hwpwm);
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}
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static int jz4740_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);
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ctrl |= JZ_TIMER_CTRL_PWM_ENABLE;
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jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
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jz4740_timer_enable(pwm->hwpwm);
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return 0;
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}
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static void jz4740_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm);
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/* Disable PWM output.
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* In TCU2 mode (channel 1/2 on JZ4750+), this must be done before the
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* counter is stopped, while in TCU1 mode the order does not matter.
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*/
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ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
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jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
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/* Stop counter */
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jz4740_timer_disable(pwm->hwpwm);
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}
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static int jz4740_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip);
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unsigned long long tmp;
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unsigned long period, duty;
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unsigned int prescaler = 0;
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uint16_t ctrl;
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bool is_enabled;
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tmp = (unsigned long long)clk_get_rate(jz4740->clk) * period_ns;
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do_div(tmp, 1000000000);
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period = tmp;
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while (period > 0xffff && prescaler < 6) {
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period >>= 2;
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++prescaler;
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}
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if (prescaler == 6)
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return -EINVAL;
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tmp = (unsigned long long)period * duty_ns;
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do_div(tmp, period_ns);
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duty = period - tmp;
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if (duty >= period)
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duty = period - 1;
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is_enabled = jz4740_timer_is_enabled(pwm->hwpwm);
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if (is_enabled)
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jz4740_pwm_disable(chip, pwm);
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jz4740_timer_set_count(pwm->hwpwm, 0);
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jz4740_timer_set_duty(pwm->hwpwm, duty);
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jz4740_timer_set_period(pwm->hwpwm, period);
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ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) | JZ_TIMER_CTRL_SRC_EXT |
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JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN;
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jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
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if (is_enabled)
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jz4740_pwm_enable(chip, pwm);
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return 0;
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}
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static int jz4740_pwm_set_polarity(struct pwm_chip *chip,
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struct pwm_device *pwm, enum pwm_polarity polarity)
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{
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uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);
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switch (polarity) {
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case PWM_POLARITY_NORMAL:
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ctrl &= ~JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
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break;
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case PWM_POLARITY_INVERSED:
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ctrl |= JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
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break;
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}
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jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
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return 0;
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}
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static const struct pwm_ops jz4740_pwm_ops = {
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.request = jz4740_pwm_request,
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.free = jz4740_pwm_free,
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.config = jz4740_pwm_config,
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.set_polarity = jz4740_pwm_set_polarity,
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.enable = jz4740_pwm_enable,
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.disable = jz4740_pwm_disable,
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.owner = THIS_MODULE,
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};
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static int jz4740_pwm_probe(struct platform_device *pdev)
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{
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struct jz4740_pwm_chip *jz4740;
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jz4740 = devm_kzalloc(&pdev->dev, sizeof(*jz4740), GFP_KERNEL);
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if (!jz4740)
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return -ENOMEM;
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jz4740->clk = devm_clk_get(&pdev->dev, "ext");
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if (IS_ERR(jz4740->clk))
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return PTR_ERR(jz4740->clk);
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jz4740->chip.dev = &pdev->dev;
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jz4740->chip.ops = &jz4740_pwm_ops;
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jz4740->chip.npwm = NUM_PWM;
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jz4740->chip.base = -1;
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jz4740->chip.of_xlate = of_pwm_xlate_with_flags;
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jz4740->chip.of_pwm_n_cells = 3;
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platform_set_drvdata(pdev, jz4740);
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return pwmchip_add(&jz4740->chip);
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}
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static int jz4740_pwm_remove(struct platform_device *pdev)
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{
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struct jz4740_pwm_chip *jz4740 = platform_get_drvdata(pdev);
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return pwmchip_remove(&jz4740->chip);
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}
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#ifdef CONFIG_OF
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static const struct of_device_id jz4740_pwm_dt_ids[] = {
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{ .compatible = "ingenic,jz4740-pwm", },
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{ .compatible = "ingenic,jz4770-pwm", },
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{ .compatible = "ingenic,jz4780-pwm", },
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{},
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};
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MODULE_DEVICE_TABLE(of, jz4740_pwm_dt_ids);
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#endif
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static struct platform_driver jz4740_pwm_driver = {
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.driver = {
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.name = "jz4740-pwm",
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.of_match_table = of_match_ptr(jz4740_pwm_dt_ids),
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},
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.probe = jz4740_pwm_probe,
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.remove = jz4740_pwm_remove,
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};
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module_platform_driver(jz4740_pwm_driver);
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MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
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MODULE_DESCRIPTION("Ingenic JZ4740 PWM driver");
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MODULE_ALIAS("platform:jz4740-pwm");
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MODULE_LICENSE("GPL");
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