92 lines
3.1 KiB
C
92 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2020-21 Intel Corporation.
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*/
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#include <linux/wwan.h>
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#include "iosm_ipc_chnl_cfg.h"
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/* Max. sizes of a downlink buffers */
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#define IPC_MEM_MAX_DL_FLASH_BUF_SIZE (64 * 1024)
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#define IPC_MEM_MAX_DL_LOOPBACK_SIZE (1 * 1024 * 1024)
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#define IPC_MEM_MAX_DL_AT_BUF_SIZE 2048
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#define IPC_MEM_MAX_DL_RPC_BUF_SIZE (32 * 1024)
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#define IPC_MEM_MAX_DL_MBIM_BUF_SIZE IPC_MEM_MAX_DL_RPC_BUF_SIZE
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/* Max. transfer descriptors for a pipe. */
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#define IPC_MEM_MAX_TDS_FLASH_DL 3
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#define IPC_MEM_MAX_TDS_FLASH_UL 6
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#define IPC_MEM_MAX_TDS_AT 4
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#define IPC_MEM_MAX_TDS_RPC 4
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#define IPC_MEM_MAX_TDS_MBIM IPC_MEM_MAX_TDS_RPC
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#define IPC_MEM_MAX_TDS_LOOPBACK 11
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/* Accumulation backoff usec */
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#define IRQ_ACC_BACKOFF_OFF 0
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/* MUX acc backoff 1ms */
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#define IRQ_ACC_BACKOFF_MUX 1000
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/* Modem channel configuration table
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* Always reserve element zero for flash channel.
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*/
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static struct ipc_chnl_cfg modem_cfg[] = {
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/* IP Mux */
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{ IPC_MEM_IP_CHL_ID_0, IPC_MEM_PIPE_0, IPC_MEM_PIPE_1,
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IPC_MEM_MAX_TDS_MUX_LITE_UL, IPC_MEM_MAX_TDS_MUX_LITE_DL,
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IPC_MEM_MAX_DL_MUX_LITE_BUF_SIZE, WWAN_PORT_UNKNOWN },
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/* RPC - 0 */
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{ IPC_MEM_CTRL_CHL_ID_1, IPC_MEM_PIPE_2, IPC_MEM_PIPE_3,
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IPC_MEM_MAX_TDS_RPC, IPC_MEM_MAX_TDS_RPC,
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IPC_MEM_MAX_DL_RPC_BUF_SIZE, WWAN_PORT_UNKNOWN },
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/* IAT0 */
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{ IPC_MEM_CTRL_CHL_ID_2, IPC_MEM_PIPE_4, IPC_MEM_PIPE_5,
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IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_DL_AT_BUF_SIZE,
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WWAN_PORT_AT },
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/* Trace */
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{ IPC_MEM_CTRL_CHL_ID_3, IPC_MEM_PIPE_6, IPC_MEM_PIPE_7,
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IPC_MEM_TDS_TRC, IPC_MEM_TDS_TRC, IPC_MEM_MAX_DL_TRC_BUF_SIZE,
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WWAN_PORT_UNKNOWN },
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/* IAT1 */
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{ IPC_MEM_CTRL_CHL_ID_4, IPC_MEM_PIPE_8, IPC_MEM_PIPE_9,
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IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_TDS_AT, IPC_MEM_MAX_DL_AT_BUF_SIZE,
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WWAN_PORT_AT },
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/* Loopback */
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{ IPC_MEM_CTRL_CHL_ID_5, IPC_MEM_PIPE_10, IPC_MEM_PIPE_11,
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IPC_MEM_MAX_TDS_LOOPBACK, IPC_MEM_MAX_TDS_LOOPBACK,
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IPC_MEM_MAX_DL_LOOPBACK_SIZE, WWAN_PORT_UNKNOWN },
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/* MBIM Channel */
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{ IPC_MEM_CTRL_CHL_ID_6, IPC_MEM_PIPE_12, IPC_MEM_PIPE_13,
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IPC_MEM_MAX_TDS_MBIM, IPC_MEM_MAX_TDS_MBIM,
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IPC_MEM_MAX_DL_MBIM_BUF_SIZE, WWAN_PORT_MBIM },
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/* Flash Channel/Coredump Channel */
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{ IPC_MEM_CTRL_CHL_ID_7, IPC_MEM_PIPE_0, IPC_MEM_PIPE_1,
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IPC_MEM_MAX_TDS_FLASH_UL, IPC_MEM_MAX_TDS_FLASH_DL,
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IPC_MEM_MAX_DL_FLASH_BUF_SIZE, WWAN_PORT_UNKNOWN },
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};
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int ipc_chnl_cfg_get(struct ipc_chnl_cfg *chnl_cfg, int index)
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{
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if (index >= ARRAY_SIZE(modem_cfg)) {
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pr_err("index: %d and array size %zu", index,
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ARRAY_SIZE(modem_cfg));
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return -ECHRNG;
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}
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if (index == IPC_MEM_MUX_IP_CH_IF_ID)
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chnl_cfg->accumulation_backoff = IRQ_ACC_BACKOFF_MUX;
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else
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chnl_cfg->accumulation_backoff = IRQ_ACC_BACKOFF_OFF;
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chnl_cfg->ul_nr_of_entries = modem_cfg[index].ul_nr_of_entries;
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chnl_cfg->dl_nr_of_entries = modem_cfg[index].dl_nr_of_entries;
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chnl_cfg->dl_buf_size = modem_cfg[index].dl_buf_size;
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chnl_cfg->id = modem_cfg[index].id;
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chnl_cfg->ul_pipe = modem_cfg[index].ul_pipe;
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chnl_cfg->dl_pipe = modem_cfg[index].dl_pipe;
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chnl_cfg->wwan_port_type = modem_cfg[index].wwan_port_type;
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return 0;
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}
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