601 lines
15 KiB
C
601 lines
15 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "../i915_selftest.h"
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#include "mock_gem_device.h"
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#include "huge_gem_object.h"
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static int igt_gem_object(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct drm_i915_gem_object *obj;
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int err = -ENOMEM;
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/* Basic test to ensure we can create an object */
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obj = i915_gem_object_create(i915, PAGE_SIZE);
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if (IS_ERR(obj)) {
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err = PTR_ERR(obj);
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pr_err("i915_gem_object_create failed, err=%d\n", err);
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goto out;
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}
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err = 0;
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i915_gem_object_put(obj);
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out:
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return err;
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}
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static int igt_phys_object(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct drm_i915_gem_object *obj;
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int err;
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/* Create an object and bind it to a contiguous set of physical pages,
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* i.e. exercise the i915_gem_object_phys API.
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*/
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obj = i915_gem_object_create(i915, PAGE_SIZE);
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if (IS_ERR(obj)) {
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err = PTR_ERR(obj);
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pr_err("i915_gem_object_create failed, err=%d\n", err);
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goto out;
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}
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mutex_lock(&i915->drm.struct_mutex);
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err = i915_gem_object_attach_phys(obj, PAGE_SIZE);
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mutex_unlock(&i915->drm.struct_mutex);
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if (err) {
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pr_err("i915_gem_object_attach_phys failed, err=%d\n", err);
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goto out_obj;
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}
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if (obj->ops != &i915_gem_phys_ops) {
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pr_err("i915_gem_object_attach_phys did not create a phys object\n");
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err = -EINVAL;
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goto out_obj;
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}
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if (!atomic_read(&obj->mm.pages_pin_count)) {
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pr_err("i915_gem_object_attach_phys did not pin its phys pages\n");
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err = -EINVAL;
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goto out_obj;
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}
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/* Make the object dirty so that put_pages must do copy back the data */
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mutex_lock(&i915->drm.struct_mutex);
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err = i915_gem_object_set_to_gtt_domain(obj, true);
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mutex_unlock(&i915->drm.struct_mutex);
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if (err) {
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pr_err("i915_gem_object_set_to_gtt_domain failed with err=%d\n",
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err);
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goto out_obj;
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}
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out_obj:
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i915_gem_object_put(obj);
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out:
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return err;
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}
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static int igt_gem_huge(void *arg)
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{
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const unsigned int nreal = 509; /* just to be awkward */
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struct drm_i915_private *i915 = arg;
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struct drm_i915_gem_object *obj;
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unsigned int n;
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int err;
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/* Basic sanitycheck of our huge fake object allocation */
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obj = huge_gem_object(i915,
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nreal * PAGE_SIZE,
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i915->ggtt.base.total + PAGE_SIZE);
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if (IS_ERR(obj))
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return PTR_ERR(obj);
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err = i915_gem_object_pin_pages(obj);
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if (err) {
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pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
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nreal, obj->base.size / PAGE_SIZE, err);
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goto out;
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}
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for (n = 0; n < obj->base.size / PAGE_SIZE; n++) {
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if (i915_gem_object_get_page(obj, n) !=
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i915_gem_object_get_page(obj, n % nreal)) {
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pr_err("Page lookup mismatch at index %u [%u]\n",
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n, n % nreal);
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err = -EINVAL;
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goto out_unpin;
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}
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}
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out_unpin:
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i915_gem_object_unpin_pages(obj);
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out:
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i915_gem_object_put(obj);
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return err;
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}
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struct tile {
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unsigned int width;
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unsigned int height;
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unsigned int stride;
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unsigned int size;
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unsigned int tiling;
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unsigned int swizzle;
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};
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static u64 swizzle_bit(unsigned int bit, u64 offset)
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{
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return (offset & BIT_ULL(bit)) >> (bit - 6);
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}
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static u64 tiled_offset(const struct tile *tile, u64 v)
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{
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u64 x, y;
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if (tile->tiling == I915_TILING_NONE)
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return v;
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y = div64_u64_rem(v, tile->stride, &x);
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v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height;
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if (tile->tiling == I915_TILING_X) {
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v += y * tile->width;
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v += div64_u64_rem(x, tile->width, &x) << tile->size;
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v += x;
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} else {
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const unsigned int ytile_span = 16;
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const unsigned int ytile_height = 32 * ytile_span;
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v += y * ytile_span;
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v += div64_u64_rem(x, ytile_span, &x) * ytile_height;
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v += x;
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}
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switch (tile->swizzle) {
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case I915_BIT_6_SWIZZLE_9:
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v ^= swizzle_bit(9, v);
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break;
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case I915_BIT_6_SWIZZLE_9_10:
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v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v);
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break;
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case I915_BIT_6_SWIZZLE_9_11:
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v ^= swizzle_bit(9, v) ^ swizzle_bit(11, v);
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break;
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case I915_BIT_6_SWIZZLE_9_10_11:
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v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v) ^ swizzle_bit(11, v);
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break;
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}
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return v;
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}
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static int check_partial_mapping(struct drm_i915_gem_object *obj,
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const struct tile *tile,
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unsigned long end_time)
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{
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const unsigned int nreal = obj->scratch / PAGE_SIZE;
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const unsigned long npages = obj->base.size / PAGE_SIZE;
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struct i915_vma *vma;
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unsigned long page;
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int err;
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if (igt_timeout(end_time,
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"%s: timed out before tiling=%d stride=%d\n",
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__func__, tile->tiling, tile->stride))
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return -EINTR;
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err = i915_gem_object_set_tiling(obj, tile->tiling, tile->stride);
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if (err)
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return err;
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GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling);
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GEM_BUG_ON(i915_gem_object_get_stride(obj) != tile->stride);
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for_each_prime_number_from(page, 1, npages) {
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struct i915_ggtt_view view =
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compute_partial_view(obj, page, MIN_CHUNK_PAGES);
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u32 __iomem *io;
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struct page *p;
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unsigned int n;
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u64 offset;
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u32 *cpu;
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GEM_BUG_ON(view.partial.size > nreal);
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err = i915_gem_object_set_to_gtt_domain(obj, true);
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if (err)
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return err;
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vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
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if (IS_ERR(vma)) {
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pr_err("Failed to pin partial view: offset=%lu\n",
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page);
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return PTR_ERR(vma);
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}
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n = page - view.partial.offset;
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GEM_BUG_ON(n >= view.partial.size);
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io = i915_vma_pin_iomap(vma);
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i915_vma_unpin(vma);
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if (IS_ERR(io)) {
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pr_err("Failed to iomap partial view: offset=%lu\n",
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page);
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return PTR_ERR(io);
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}
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err = i915_vma_get_fence(vma);
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if (err) {
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pr_err("Failed to get fence for partial view: offset=%lu\n",
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page);
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i915_vma_unpin_iomap(vma);
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return err;
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}
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iowrite32(page, io + n * PAGE_SIZE/sizeof(*io));
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i915_vma_unpin_iomap(vma);
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offset = tiled_offset(tile, page << PAGE_SHIFT);
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if (offset >= obj->base.size)
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continue;
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i915_gem_object_flush_gtt_write_domain(obj);
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p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);
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cpu = kmap(p) + offset_in_page(offset);
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drm_clflush_virt_range(cpu, sizeof(*cpu));
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if (*cpu != (u32)page) {
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pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%llu + %u [0x%llx]) of 0x%x, found 0x%x\n",
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page, n,
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view.partial.offset,
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view.partial.size,
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vma->size >> PAGE_SHIFT,
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tile_row_pages(obj),
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vma->fence ? vma->fence->id : -1, tile->tiling, tile->stride,
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offset >> PAGE_SHIFT,
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(unsigned int)offset_in_page(offset),
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offset,
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(u32)page, *cpu);
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err = -EINVAL;
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}
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*cpu = 0;
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drm_clflush_virt_range(cpu, sizeof(*cpu));
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kunmap(p);
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if (err)
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return err;
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}
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return 0;
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}
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static int igt_partial_tiling(void *arg)
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{
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const unsigned int nreal = 1 << 12; /* largest tile row x2 */
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struct drm_i915_private *i915 = arg;
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struct drm_i915_gem_object *obj;
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int tiling;
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int err;
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/* We want to check the page mapping and fencing of a large object
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* mmapped through the GTT. The object we create is larger than can
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* possibly be mmaped as a whole, and so we must use partial GGTT vma.
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* We then check that a write through each partial GGTT vma ends up
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* in the right set of pages within the object, and with the expected
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* tiling, which we verify by manual swizzling.
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*/
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obj = huge_gem_object(i915,
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nreal << PAGE_SHIFT,
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(1 + next_prime_number(i915->ggtt.base.total >> PAGE_SHIFT)) << PAGE_SHIFT);
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if (IS_ERR(obj))
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return PTR_ERR(obj);
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err = i915_gem_object_pin_pages(obj);
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if (err) {
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pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
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nreal, obj->base.size / PAGE_SIZE, err);
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goto out;
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}
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mutex_lock(&i915->drm.struct_mutex);
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if (1) {
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IGT_TIMEOUT(end);
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struct tile tile;
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tile.height = 1;
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tile.width = 1;
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tile.size = 0;
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tile.stride = 0;
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tile.swizzle = I915_BIT_6_SWIZZLE_NONE;
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tile.tiling = I915_TILING_NONE;
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err = check_partial_mapping(obj, &tile, end);
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if (err && err != -EINTR)
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goto out_unlock;
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}
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for (tiling = I915_TILING_X; tiling <= I915_TILING_Y; tiling++) {
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IGT_TIMEOUT(end);
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unsigned int max_pitch;
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unsigned int pitch;
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struct tile tile;
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tile.tiling = tiling;
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switch (tiling) {
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case I915_TILING_X:
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tile.swizzle = i915->mm.bit_6_swizzle_x;
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break;
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case I915_TILING_Y:
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tile.swizzle = i915->mm.bit_6_swizzle_y;
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break;
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}
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if (tile.swizzle == I915_BIT_6_SWIZZLE_UNKNOWN ||
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tile.swizzle == I915_BIT_6_SWIZZLE_9_10_17)
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continue;
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if (INTEL_GEN(i915) <= 2) {
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tile.height = 16;
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tile.width = 128;
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tile.size = 11;
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} else if (tile.tiling == I915_TILING_Y &&
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HAS_128_BYTE_Y_TILING(i915)) {
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tile.height = 32;
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tile.width = 128;
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tile.size = 12;
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} else {
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tile.height = 8;
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tile.width = 512;
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tile.size = 12;
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}
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if (INTEL_GEN(i915) < 4)
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max_pitch = 8192 / tile.width;
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else if (INTEL_GEN(i915) < 7)
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max_pitch = 128 * I965_FENCE_MAX_PITCH_VAL / tile.width;
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else
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max_pitch = 128 * GEN7_FENCE_MAX_PITCH_VAL / tile.width;
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for (pitch = max_pitch; pitch; pitch >>= 1) {
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tile.stride = tile.width * pitch;
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err = check_partial_mapping(obj, &tile, end);
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if (err == -EINTR)
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goto next_tiling;
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if (err)
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goto out_unlock;
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if (pitch > 2 && INTEL_GEN(i915) >= 4) {
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tile.stride = tile.width * (pitch - 1);
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err = check_partial_mapping(obj, &tile, end);
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if (err == -EINTR)
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goto next_tiling;
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if (err)
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goto out_unlock;
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}
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if (pitch < max_pitch && INTEL_GEN(i915) >= 4) {
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tile.stride = tile.width * (pitch + 1);
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err = check_partial_mapping(obj, &tile, end);
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if (err == -EINTR)
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goto next_tiling;
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if (err)
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goto out_unlock;
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}
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}
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if (INTEL_GEN(i915) >= 4) {
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for_each_prime_number(pitch, max_pitch) {
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tile.stride = tile.width * pitch;
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err = check_partial_mapping(obj, &tile, end);
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if (err == -EINTR)
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goto next_tiling;
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if (err)
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goto out_unlock;
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}
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}
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next_tiling: ;
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}
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out_unlock:
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mutex_unlock(&i915->drm.struct_mutex);
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i915_gem_object_unpin_pages(obj);
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out:
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i915_gem_object_put(obj);
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return err;
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}
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static int make_obj_busy(struct drm_i915_gem_object *obj)
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{
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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struct drm_i915_gem_request *rq;
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struct i915_vma *vma;
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int err;
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vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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err = i915_vma_pin(vma, 0, 0, PIN_USER);
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if (err)
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return err;
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rq = i915_gem_request_alloc(i915->engine[RCS], i915->kernel_context);
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if (IS_ERR(rq)) {
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i915_vma_unpin(vma);
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return PTR_ERR(rq);
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}
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i915_vma_move_to_active(vma, rq, 0);
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i915_add_request(rq);
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i915_gem_object_set_active_reference(obj);
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i915_vma_unpin(vma);
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return 0;
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}
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static bool assert_mmap_offset(struct drm_i915_private *i915,
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unsigned long size,
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int expected)
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{
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struct drm_i915_gem_object *obj;
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int err;
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obj = i915_gem_object_create_internal(i915, size);
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if (IS_ERR(obj))
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return PTR_ERR(obj);
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err = i915_gem_object_create_mmap_offset(obj);
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i915_gem_object_put(obj);
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return err == expected;
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}
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static int igt_mmap_offset_exhaustion(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct drm_mm *mm = &i915->drm.vma_offset_manager->vm_addr_space_mm;
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struct drm_i915_gem_object *obj;
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struct drm_mm_node resv, *hole;
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u64 hole_start, hole_end;
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int loop, err;
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/* Trim the device mmap space to only a page */
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memset(&resv, 0, sizeof(resv));
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drm_mm_for_each_hole(hole, mm, hole_start, hole_end) {
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resv.start = hole_start;
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resv.size = hole_end - hole_start - 1; /* PAGE_SIZE units */
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err = drm_mm_reserve_node(mm, &resv);
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if (err) {
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pr_err("Failed to trim VMA manager, err=%d\n", err);
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return err;
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}
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break;
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}
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/* Just fits! */
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if (!assert_mmap_offset(i915, PAGE_SIZE, 0)) {
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|
pr_err("Unable to insert object into single page hole\n");
|
|
err = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
/* Too large */
|
|
if (!assert_mmap_offset(i915, 2*PAGE_SIZE, -ENOSPC)) {
|
|
pr_err("Unexpectedly succeeded in inserting too large object into single page hole\n");
|
|
err = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
/* Fill the hole, further allocation attempts should then fail */
|
|
obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
|
|
if (IS_ERR(obj)) {
|
|
err = PTR_ERR(obj);
|
|
goto out;
|
|
}
|
|
|
|
err = i915_gem_object_create_mmap_offset(obj);
|
|
if (err) {
|
|
pr_err("Unable to insert object into reclaimed hole\n");
|
|
goto err_obj;
|
|
}
|
|
|
|
if (!assert_mmap_offset(i915, PAGE_SIZE, -ENOSPC)) {
|
|
pr_err("Unexpectedly succeeded in inserting object into no holes!\n");
|
|
err = -EINVAL;
|
|
goto err_obj;
|
|
}
|
|
|
|
i915_gem_object_put(obj);
|
|
|
|
/* Now fill with busy dead objects that we expect to reap */
|
|
for (loop = 0; loop < 3; loop++) {
|
|
obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
|
|
if (IS_ERR(obj)) {
|
|
err = PTR_ERR(obj);
|
|
goto out;
|
|
}
|
|
|
|
mutex_lock(&i915->drm.struct_mutex);
|
|
err = make_obj_busy(obj);
|
|
mutex_unlock(&i915->drm.struct_mutex);
|
|
if (err) {
|
|
pr_err("[loop %d] Failed to busy the object\n", loop);
|
|
goto err_obj;
|
|
}
|
|
|
|
GEM_BUG_ON(!i915_gem_object_is_active(obj));
|
|
err = i915_gem_object_create_mmap_offset(obj);
|
|
if (err) {
|
|
pr_err("[loop %d] i915_gem_object_create_mmap_offset failed with err=%d\n",
|
|
loop, err);
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
out:
|
|
drm_mm_remove_node(&resv);
|
|
return err;
|
|
err_obj:
|
|
i915_gem_object_put(obj);
|
|
goto out;
|
|
}
|
|
|
|
int i915_gem_object_mock_selftests(void)
|
|
{
|
|
static const struct i915_subtest tests[] = {
|
|
SUBTEST(igt_gem_object),
|
|
SUBTEST(igt_phys_object),
|
|
};
|
|
struct drm_i915_private *i915;
|
|
int err;
|
|
|
|
i915 = mock_gem_device();
|
|
if (!i915)
|
|
return -ENOMEM;
|
|
|
|
err = i915_subtests(tests, i915);
|
|
|
|
drm_dev_unref(&i915->drm);
|
|
return err;
|
|
}
|
|
|
|
int i915_gem_object_live_selftests(struct drm_i915_private *i915)
|
|
{
|
|
static const struct i915_subtest tests[] = {
|
|
SUBTEST(igt_gem_huge),
|
|
SUBTEST(igt_partial_tiling),
|
|
SUBTEST(igt_mmap_offset_exhaustion),
|
|
};
|
|
|
|
return i915_subtests(tests, i915);
|
|
}
|