228 lines
7.0 KiB
C
228 lines
7.0 KiB
C
/*
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* Copyright (c) 2004-2011 Atheros Communications Inc.
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* Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
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* Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _SDIO_H_
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#define _SDIO_H_
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#define ATH10K_HIF_MBOX_BLOCK_SIZE 256
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#define QCA_MANUFACTURER_ID_BASE GENMASK(11, 8)
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#define QCA_MANUFACTURER_ID_AR6005_BASE 0x5
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#define QCA_MANUFACTURER_ID_QCA9377_BASE 0x7
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#define QCA_SDIO_ID_AR6005_BASE 0x500
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#define QCA_SDIO_ID_QCA9377_BASE 0x700
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#define QCA_MANUFACTURER_ID_REV_MASK 0x00FF
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#define QCA_MANUFACTURER_CODE 0x271 /* Qualcomm/Atheros */
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#define ATH10K_SDIO_MAX_BUFFER_SIZE 4096 /*Unsure of this constant*/
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/* Mailbox address in SDIO address space */
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#define ATH10K_HIF_MBOX_BASE_ADDR 0x1000
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#define ATH10K_HIF_MBOX_WIDTH 0x800
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#define ATH10K_HIF_MBOX_TOT_WIDTH \
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(ATH10K_HIF_MBOX_NUM_MAX * ATH10K_HIF_MBOX_WIDTH)
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#define ATH10K_HIF_MBOX0_EXT_BASE_ADDR 0x5000
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#define ATH10K_HIF_MBOX0_EXT_WIDTH (36 * 1024)
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#define ATH10K_HIF_MBOX0_EXT_WIDTH_ROME_2_0 (56 * 1024)
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#define ATH10K_HIF_MBOX1_EXT_WIDTH (36 * 1024)
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#define ATH10K_HIF_MBOX_DUMMY_SPACE_SIZE (2 * 1024)
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#define ATH10K_HTC_MBOX_MAX_PAYLOAD_LENGTH \
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(ATH10K_SDIO_MAX_BUFFER_SIZE - sizeof(struct ath10k_htc_hdr))
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#define ATH10K_HIF_MBOX_NUM_MAX 4
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#define ATH10K_SDIO_BUS_REQUEST_MAX_NUM 64
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#define ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ (100 * HZ)
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/* HTC runs over mailbox 0 */
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#define ATH10K_HTC_MAILBOX 0
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#define ATH10K_HTC_MAILBOX_MASK BIT(ATH10K_HTC_MAILBOX)
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/* GMBOX addresses */
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#define ATH10K_HIF_GMBOX_BASE_ADDR 0x7000
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#define ATH10K_HIF_GMBOX_WIDTH 0x4000
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/* Modified versions of the sdio.h macros.
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* The macros in sdio.h can't be used easily with the FIELD_{PREP|GET}
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* macros in bitfield.h, so we define our own macros here.
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*/
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#define ATH10K_SDIO_DRIVE_DTSX_MASK \
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(SDIO_DRIVE_DTSx_MASK << SDIO_DRIVE_DTSx_SHIFT)
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#define ATH10K_SDIO_DRIVE_DTSX_TYPE_B 0
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#define ATH10K_SDIO_DRIVE_DTSX_TYPE_A 1
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#define ATH10K_SDIO_DRIVE_DTSX_TYPE_C 2
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#define ATH10K_SDIO_DRIVE_DTSX_TYPE_D 3
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/* SDIO CCCR register definitions */
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#define CCCR_SDIO_IRQ_MODE_REG 0xF0
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#define CCCR_SDIO_IRQ_MODE_REG_SDIO3 0x16
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#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR 0xF2
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#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_A 0x02
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#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_C 0x04
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#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_D 0x08
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#define CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS 0xF0
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#define CCCR_SDIO_ASYNC_INT_DELAY_MASK 0xC0
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/* mode to enable special 4-bit interrupt assertion without clock */
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#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ BIT(0)
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#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ_SDIO3 BIT(1)
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#define ATH10K_SDIO_TARGET_DEBUG_INTR_MASK 0x01
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/* The theoretical maximum number of RX messages that can be fetched
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* from the mbox interrupt handler in one loop is derived in the following
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* way:
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*
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* Let's assume that each packet in a bundle of the maximum bundle size
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* (HTC_HOST_MAX_MSG_PER_BUNDLE) has the HTC header bundle count set
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* to the maximum value (HTC_HOST_MAX_MSG_PER_BUNDLE).
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*
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* in this case the driver must allocate
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* (HTC_HOST_MAX_MSG_PER_BUNDLE * HTC_HOST_MAX_MSG_PER_BUNDLE) skb's.
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*/
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#define ATH10K_SDIO_MAX_RX_MSGS \
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(HTC_HOST_MAX_MSG_PER_BUNDLE * HTC_HOST_MAX_MSG_PER_BUNDLE)
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#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL 0x00000868u
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#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_OFF 0xFFFEFFFF
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#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_ON 0x10000
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struct ath10k_sdio_bus_request {
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struct list_head list;
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/* sdio address */
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u32 address;
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struct sk_buff *skb;
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enum ath10k_htc_ep_id eid;
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int status;
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/* Specifies if the current request is an HTC message.
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* If not, the eid is not applicable an the TX completion handler
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* associated with the endpoint will not be invoked.
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*/
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bool htc_msg;
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/* Completion that (if set) will be invoked for non HTC requests
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* (htc_msg == false) when the request has been processed.
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*/
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struct completion *comp;
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};
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struct ath10k_sdio_rx_data {
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struct sk_buff *skb;
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size_t alloc_len;
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size_t act_len;
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enum ath10k_htc_ep_id eid;
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bool part_of_bundle;
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bool last_in_bundle;
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bool trailer_only;
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int status;
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};
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struct ath10k_sdio_irq_proc_regs {
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u8 host_int_status;
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u8 cpu_int_status;
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u8 error_int_status;
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u8 counter_int_status;
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u8 mbox_frame;
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u8 rx_lookahead_valid;
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u8 host_int_status2;
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u8 gmbox_rx_avail;
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__le32 rx_lookahead[2];
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__le32 rx_gmbox_lookahead_alias[2];
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};
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struct ath10k_sdio_irq_enable_regs {
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u8 int_status_en;
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u8 cpu_int_status_en;
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u8 err_int_status_en;
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u8 cntr_int_status_en;
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};
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struct ath10k_sdio_irq_data {
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/* protects irq_proc_reg and irq_en_reg below.
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* We use a mutex here and not a spinlock since we will have the
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* mutex locked while calling the sdio_memcpy_ functions.
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* These function require non atomic context, and hence, spinlocks
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* can be held while calling these functions.
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*/
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struct mutex mtx;
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struct ath10k_sdio_irq_proc_regs *irq_proc_reg;
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struct ath10k_sdio_irq_enable_regs *irq_en_reg;
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};
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struct ath10k_mbox_ext_info {
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u32 htc_ext_addr;
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u32 htc_ext_sz;
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};
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struct ath10k_mbox_info {
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u32 htc_addr;
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struct ath10k_mbox_ext_info ext_info[2];
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u32 block_size;
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u32 block_mask;
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u32 gmbox_addr;
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u32 gmbox_sz;
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};
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struct ath10k_sdio {
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struct sdio_func *func;
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struct ath10k_mbox_info mbox_info;
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bool swap_mbox;
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u32 mbox_addr[ATH10K_HTC_EP_COUNT];
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u32 mbox_size[ATH10K_HTC_EP_COUNT];
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/* available bus requests */
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struct ath10k_sdio_bus_request bus_req[ATH10K_SDIO_BUS_REQUEST_MAX_NUM];
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/* free list of bus requests */
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struct list_head bus_req_freeq;
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/* protects access to bus_req_freeq */
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spinlock_t lock;
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struct ath10k_sdio_rx_data rx_pkts[ATH10K_SDIO_MAX_RX_MSGS];
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size_t n_rx_pkts;
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struct ath10k *ar;
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struct ath10k_sdio_irq_data irq_data;
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/* temporary buffer for BMI requests */
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u8 *bmi_buf;
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bool is_disabled;
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struct workqueue_struct *workqueue;
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struct work_struct wr_async_work;
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struct list_head wr_asyncq;
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/* protects access to wr_asyncq */
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spinlock_t wr_async_lock;
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};
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static inline struct ath10k_sdio *ath10k_sdio_priv(struct ath10k *ar)
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{
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return (struct ath10k_sdio *)ar->drv_priv;
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}
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#endif
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