274 lines
5.5 KiB
Plaintext
274 lines
5.5 KiB
Plaintext
/*
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* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "imx27-eukrea-cpuimx27.dtsi"
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/ {
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model = "Eukrea MBIMXSD27";
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compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27";
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display0: CMO-QVGA {
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model = "CMO-QVGA";
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native-mode = <&timing0>;
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bits-per-pixel = <16>;
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fsl,pcr = <0xfad08b80>;
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display-timings {
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timing0: 320x240 {
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clock-frequency = <6500000>;
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hactive = <320>;
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vactive = <240>;
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hback-porch = <20>;
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hsync-len = <30>;
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hfront-porch = <38>;
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vback-porch = <4>;
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vsync-len = <3>;
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vfront-porch = <15>;
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};
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};
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};
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backlight {
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compatible = "gpio-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_backlight>;
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gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpioleds>;
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led1 {
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label = "system::live";
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gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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};
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led2 {
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label = "system::user";
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gpios = <&gpio6 19 GPIO_ACTIVE_LOW>;
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};
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};
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regulators {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "simple-bus";
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reg_lcd: regulator@0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcdreg>;
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "LCD";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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};
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&cspi1 {
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pinctrl-0 = <&pinctrl_cspi1>;
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
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status = "okay";
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ads7846 {
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compatible = "ti,ads7846";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_touch>;
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reg = <0>;
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interrupts = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
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spi-cpol;
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spi-max-frequency = <1500000>;
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ti,keep-vref-on;
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};
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};
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&fb {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_imxfb>;
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display = <&display0>;
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lcd-supply = <®_lcd>;
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fsl,dmacr = <0x00040060>;
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fsl,lscr1 = <0x00120300>;
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fsl,lpccr = <0x00a903ff>;
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status = "okay";
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};
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&i2c1 {
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codec: codec@1a {
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compatible = "ti,tlv320aic23";
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reg = <0x1a>;
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};
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};
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&kpp {
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linux,keymap = <
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MATRIX_KEY(0, 0, KEY_UP)
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MATRIX_KEY(0, 1, KEY_DOWN)
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MATRIX_KEY(1, 0, KEY_RIGHT)
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MATRIX_KEY(1, 1, KEY_LEFT)
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>;
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status = "okay";
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};
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&sdhci1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdhc1>;
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bus-width = <4>;
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status = "okay";
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};
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&ssi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssi1>;
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codec-handle = <&codec>;
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status = "okay";
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};
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&uart1 {
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uart-has-rtscts;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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uart-has-rtscts;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&uart3 {
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uart-has-rtscts;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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&iomuxc {
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imx27-eukrea-cpuimx27-baseboard {
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pinctrl_cspi1: cspi1grp {
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fsl,pins = <
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MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
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MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
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MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
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MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* CS0 */
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>;
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};
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pinctrl_backlight: backlightgrp {
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fsl,pins = <
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MX27_PAD_PWMO__GPIO5_5 0x0
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>;
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};
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pinctrl_gpioleds: gpioledsgrp {
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fsl,pins = <
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MX27_PAD_PC_PWRON__GPIO6_16 0x0
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MX27_PAD_PC_CD2_B__GPIO6_19 0x0
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>;
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};
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pinctrl_imxfb: imxfbgrp {
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fsl,pins = <
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MX27_PAD_LD0__LD0 0x0
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MX27_PAD_LD1__LD1 0x0
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MX27_PAD_LD2__LD2 0x0
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MX27_PAD_LD3__LD3 0x0
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MX27_PAD_LD4__LD4 0x0
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MX27_PAD_LD5__LD5 0x0
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MX27_PAD_LD6__LD6 0x0
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MX27_PAD_LD7__LD7 0x0
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MX27_PAD_LD8__LD8 0x0
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MX27_PAD_LD9__LD9 0x0
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MX27_PAD_LD10__LD10 0x0
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MX27_PAD_LD11__LD11 0x0
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MX27_PAD_LD12__LD12 0x0
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MX27_PAD_LD13__LD13 0x0
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MX27_PAD_LD14__LD14 0x0
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MX27_PAD_LD15__LD15 0x0
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MX27_PAD_LD16__LD16 0x0
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MX27_PAD_LD17__LD17 0x0
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MX27_PAD_CONTRAST__CONTRAST 0x0
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MX27_PAD_OE_ACD__OE_ACD 0x0
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MX27_PAD_HSYNC__HSYNC 0x0
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MX27_PAD_VSYNC__VSYNC 0x0
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>;
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};
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pinctrl_lcdreg: lcdreggrp {
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fsl,pins = <
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MX27_PAD_CLS__GPIO1_25 0x0
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>;
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};
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pinctrl_sdhc1: sdhc1grp {
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fsl,pins = <
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MX27_PAD_SD1_CLK__SD1_CLK 0x0
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MX27_PAD_SD1_CMD__SD1_CMD 0x0
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MX27_PAD_SD1_D0__SD1_D0 0x0
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MX27_PAD_SD1_D1__SD1_D1 0x0
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MX27_PAD_SD1_D2__SD1_D2 0x0
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MX27_PAD_SD1_D3__SD1_D3 0x0
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>;
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};
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pinctrl_ssi1: ssi1grp {
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fsl,pins = <
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MX27_PAD_SSI4_CLK__SSI4_CLK 0x0
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MX27_PAD_SSI4_FS__SSI4_FS 0x0
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MX27_PAD_SSI4_RXDAT__SSI4_RXDAT 0x1
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MX27_PAD_SSI4_TXDAT__SSI4_TXDAT 0x1
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>;
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};
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pinctrl_touch: touchgrp {
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fsl,pins = <
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MX27_PAD_CSPI1_RDY__GPIO4_25 0x0 /* IRQ */
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX27_PAD_UART1_TXD__UART1_TXD 0x0
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MX27_PAD_UART1_RXD__UART1_RXD 0x0
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MX27_PAD_UART1_CTS__UART1_CTS 0x0
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MX27_PAD_UART1_RTS__UART1_RTS 0x0
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX27_PAD_UART2_TXD__UART2_TXD 0x0
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MX27_PAD_UART2_RXD__UART2_RXD 0x0
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MX27_PAD_UART2_CTS__UART2_CTS 0x0
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MX27_PAD_UART2_RTS__UART2_RTS 0x0
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX27_PAD_UART3_TXD__UART3_TXD 0x0
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MX27_PAD_UART3_RXD__UART3_RXD 0x0
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MX27_PAD_UART3_CTS__UART3_CTS 0x0
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MX27_PAD_UART3_RTS__UART3_RTS 0x0
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>;
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};
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};
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};
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