213 lines
4.9 KiB
ArmAsm
213 lines
4.9 KiB
ArmAsm
/*
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* Copyright (C) 2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/alternative.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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#include <asm/cpufeature.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_mmu.h>
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.text
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.pushsection .hyp.text, "ax"
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.macro save_x0_to_x3
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stp x0, x1, [sp, #-16]!
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stp x2, x3, [sp, #-16]!
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.endm
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.macro restore_x0_to_x3
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ldp x2, x3, [sp], #16
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ldp x0, x1, [sp], #16
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.endm
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el1_sync: // Guest trapped into EL2
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save_x0_to_x3
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mrs x1, esr_el2
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lsr x2, x1, #ESR_ELx_EC_SHIFT
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cmp x2, #ESR_ELx_EC_HVC64
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b.ne el1_trap
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mrs x3, vttbr_el2 // If vttbr is valid, the 64bit guest
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cbnz x3, el1_trap // called HVC
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/* Here, we're pretty sure the host called HVC. */
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restore_x0_to_x3
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/* Check for __hyp_get_vectors */
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cbnz x0, 1f
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mrs x0, vbar_el2
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b 2f
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1: stp lr, xzr, [sp, #-16]!
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/*
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* Compute the function address in EL2, and shuffle the parameters.
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*/
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kern_hyp_va x0
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mov lr, x0
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mov x0, x1
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mov x1, x2
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mov x2, x3
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blr lr
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ldp lr, xzr, [sp], #16
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2: eret
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el1_trap:
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/*
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* x1: ESR
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* x2: ESR_EC
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*/
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/* Guest accessed VFP/SIMD registers, save host, restore Guest */
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cmp x2, #ESR_ELx_EC_FP_ASIMD
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b.eq __fpsimd_guest_restore
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cmp x2, #ESR_ELx_EC_DABT_LOW
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mov x0, #ESR_ELx_EC_IABT_LOW
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ccmp x2, x0, #4, ne
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b.ne 1f // Not an abort we care about
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/* This is an abort. Check for permission fault */
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alternative_if_not ARM64_WORKAROUND_834220
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and x2, x1, #ESR_ELx_FSC_TYPE
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cmp x2, #FSC_PERM
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b.ne 1f // Not a permission fault
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alternative_else
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nop // Use the permission fault path to
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nop // check for a valid S1 translation,
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nop // regardless of the ESR value.
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alternative_endif
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/*
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* Check for Stage-1 page table walk, which is guaranteed
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* to give a valid HPFAR_EL2.
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*/
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tbnz x1, #7, 1f // S1PTW is set
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/* Preserve PAR_EL1 */
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mrs x3, par_el1
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stp x3, xzr, [sp, #-16]!
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/*
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* Permission fault, HPFAR_EL2 is invalid.
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* Resolve the IPA the hard way using the guest VA.
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* Stage-1 translation already validated the memory access rights.
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* As such, we can use the EL1 translation regime, and don't have
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* to distinguish between EL0 and EL1 access.
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*/
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mrs x2, far_el2
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at s1e1r, x2
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isb
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/* Read result */
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mrs x3, par_el1
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ldp x0, xzr, [sp], #16 // Restore PAR_EL1 from the stack
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msr par_el1, x0
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tbnz x3, #0, 3f // Bail out if we failed the translation
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ubfx x3, x3, #12, #36 // Extract IPA
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lsl x3, x3, #4 // and present it like HPFAR
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b 2f
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1: mrs x3, hpfar_el2
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mrs x2, far_el2
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2: mrs x0, tpidr_el2
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str w1, [x0, #VCPU_ESR_EL2]
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str x2, [x0, #VCPU_FAR_EL2]
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str x3, [x0, #VCPU_HPFAR_EL2]
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mov x1, #ARM_EXCEPTION_TRAP
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b __guest_exit
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/*
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* Translation failed. Just return to the guest and
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* let it fault again. Another CPU is probably playing
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* behind our back.
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*/
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3: restore_x0_to_x3
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eret
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el1_irq:
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save_x0_to_x3
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mrs x0, tpidr_el2
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mov x1, #ARM_EXCEPTION_IRQ
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b __guest_exit
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ENTRY(__hyp_do_panic)
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mov lr, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
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PSR_MODE_EL1h)
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msr spsr_el2, lr
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ldr lr, =panic
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msr elr_el2, lr
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eret
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ENDPROC(__hyp_do_panic)
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.macro invalid_vector label, target = __hyp_panic
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.align 2
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\label:
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b \target
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ENDPROC(\label)
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.endm
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/* None of these should ever happen */
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invalid_vector el2t_sync_invalid
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invalid_vector el2t_irq_invalid
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invalid_vector el2t_fiq_invalid
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invalid_vector el2t_error_invalid
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invalid_vector el2h_sync_invalid
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invalid_vector el2h_irq_invalid
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invalid_vector el2h_fiq_invalid
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invalid_vector el2h_error_invalid
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invalid_vector el1_sync_invalid
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invalid_vector el1_irq_invalid
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invalid_vector el1_fiq_invalid
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invalid_vector el1_error_invalid
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.ltorg
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.align 11
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ENTRY(__kvm_hyp_vector)
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ventry el2t_sync_invalid // Synchronous EL2t
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ventry el2t_irq_invalid // IRQ EL2t
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ventry el2t_fiq_invalid // FIQ EL2t
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ventry el2t_error_invalid // Error EL2t
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ventry el2h_sync_invalid // Synchronous EL2h
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ventry el2h_irq_invalid // IRQ EL2h
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ventry el2h_fiq_invalid // FIQ EL2h
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ventry el2h_error_invalid // Error EL2h
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ventry el1_sync // Synchronous 64-bit EL1
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ventry el1_irq // IRQ 64-bit EL1
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ventry el1_fiq_invalid // FIQ 64-bit EL1
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ventry el1_error_invalid // Error 64-bit EL1
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ventry el1_sync // Synchronous 32-bit EL1
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ventry el1_irq // IRQ 32-bit EL1
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ventry el1_fiq_invalid // FIQ 32-bit EL1
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ventry el1_error_invalid // Error 32-bit EL1
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ENDPROC(__kvm_hyp_vector)
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