OpenCloudOS-Kernel/drivers/pinctrl/sh-pfc
Linus Torvalds bd698cf659 This is the bulk of pin control changes for the v3.16
development cycle:
 
 - Antoine Tenart made the get_group_pins() vtable entry
   optional.
 
 - Antoine also provides an entirely new driver for the
   Marvell Berlin SoC. This is unrelated to the existing
   MVEBU hardware driver and warrants its own separate
   driver.
 
 - Reflected from the GPIO subsystem there is a number of
   refactorings to make pin control drivers with gpiochips
   use the new gpiolib irqchip helpers. The following
   drivers were converted to use the new infrastructure:
 
   - ST Microelectronics STiH416 and friends
 
   - The Atmel AT91
 
   - The CSR SiRF (Prima2)
 
   - The Qualcomm MSM series
 
 - Massive improvements in the Qualcomm MSM driver from
   Bjorn Andersson, Andy Gross and Kumar Gala. Among those
   new support for the IPQ8064 and MSM8x74 SoC variants.
 
 - Support for the Freescale i.MX6 SoloX SoC variant.
 
 - Massive improvements in the Allwinner sunxi driver from
   Boris Brezillon, Maxime Ripard and Chen-Yu Tsai.
 
 - Renesas PFC updates from Laurent Pinchart, Kuninori
   Morimoto, Wolfram Sang and Magnus Damm.
 
 - Cleanups and refactorings of the nVidia Tegra driver from
   Stepgen Warren.
 
 - The Exynos driver now supports the Exynos3250 SoC.
 
 - Intel BayTrail updates from Jin Yao, Mika Westerberg.
 
 - The MVEBU driver now supports the Orion5x SoC
   variants, which is part of the effort of getting rid of
   the old Marvell kludges in arch/arm/mach-orion5x
 
 - Rockchip driver updates from Heiko Stuebner.
 
 - A ton of cleanups and janitorial patches from Axel Lin.
 
 - Some minor fixes and improvements here and there.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJTjXDAAAoJEEEQszewGV1z8zsP/i+7o5sU+rm3ZwfpCyuVih7E
 90nHTMzV2Se+8gX4D0jLZUYkxMQn9pkqG616IyT5kP5sx9co8raoAUC1Qmv6b7rI
 kIlfCaDvjPzEWgH9KZNjMP8P0rqdj8TelDRSZ0EPzHdfyUwxFmLRnFo7ywguPCG2
 SOM1uo7XhjXmphoUP7ZZWs3doflYxBAL3ZdK77QQcLEQjlNxSz/vbls6ldkKie7C
 XF7DKvGqphB8GdGKkdFvyhjQNy26rBanZRy94yU53Ak5zc0mTtmO+WEjiByAW1m7
 Fy6AVdZZhl6BLxzn9rUzsKdrWzaWzUkQNilhEO1u7OfZtNQbuYWcv7GJ7h37lIzI
 P0jegOy+7d4JxPyROphtJXx6AwV1pFFimMnWS4rHwUdjwMBVRnlOKQW/G7ulEBsn
 wD5MhD76nHySKtjYquI+iVHbmE06hG8iDUUxFm2saVG8O7Siw+E2aCXPLm9+Lp5R
 fBNuj8lnTy8/F6sHyPs8Bw6u8Ra5uSmRhV4j3B/jZG8pAksqUK6xOmjdVdE7JmoH
 qIZxuQhqrAhjmGkAg/ys5SUuMMbegxTI2f+rDy7rpWonbVOtaItMpgbYwyiQpIR4
 BDmlwZi5BNupiEW7Yzp6utWYIyYA0ntuMGpnqnPBDBCn5jZOCUTMjZXAPCDK5dEN
 Ktyu+5jCBZgpqS+KgTXl
 =wGE5
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v3.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into next

Pull pin control changes from Linus Walleij:
 "This is the bulk of pin control changes for the v3.16 development
  cycle:

   - Antoine Tenart made the get_group_pins() vtable entry optional.

   - Antoine also provides an entirely new driver for the Marvell Berlin
     SoC.  This is unrelated to the existing MVEBU hardware driver and
     warrants its own separate driver.

   - reflected from the GPIO subsystem there is a number of refactorings
     to make pin control drivers with gpiochips use the new gpiolib
     irqchip helpers.  The following drivers were converted to use the
     new infrastructure:
       * ST Microelectronics STiH416 and friends
       * The Atmel AT91
       * The CSR SiRF (Prima2)
       * The Qualcomm MSM series

   - massive improvements in the Qualcomm MSM driver from Bjorn
     Andersson, Andy Gross and Kumar Gala.  Among those new support for
     the IPQ8064 and MSM8x74 SoC variants.

   - support for the Freescale i.MX6 SoloX SoC variant.

   - massive improvements in the Allwinner sunxi driver from Boris
     Brezillon, Maxime Ripard and Chen-Yu Tsai.

   - Renesas PFC updates from Laurent Pinchart, Kuninori Morimoto,
     Wolfram Sang and Magnus Damm.

   - Cleanups and refactorings of the nVidia Tegra driver from Stepgen
     Warren.

   - the Exynos driver now supports the Exynos3250 SoC.

   - Intel BayTrail updates from Jin Yao, Mika Westerberg.

   - the MVEBU driver now supports the Orion5x SoC variants, which is
     part of the effort of getting rid of the old Marvell kludges in
     arch/arm/mach-orion5x

   - Rockchip driver updates from Heiko Stuebner.

   - a ton of cleanups and janitorial patches from Axel Lin.

   - some minor fixes and improvements here and there"

* tag 'pinctrl-v3.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (93 commits)
  pinctrl: sirf: fix a bad conflict resolution
  pinctrl: msm: Add more MSM8X74 pin definitions
  pinctrl: qcom: ipq8064: Fix naming convention
  pinctrl: msm: Add missing sdc1 and sdc3 groups
  pinctrl: sirf: switch to using allocated state container
  pinctrl: Enable "power-source" to be extracted from DT files
  pinctrl: sunxi: create irq/pin mapping during init
  pinctrl: pinconf-generic: Use kmemdup instead of kmalloc + memcpy
  pinctrl: berlin: Use devm_ioremap_resource()
  pinctrl: sirf: fix typo for GPIO bank number
  pinctrl: sunxi: depend on RESET_CONTROLLER
  pinctrl: sunxi: fix pin numbers passed to register offset helpers
  pinctrl: add pinctrl driver for imx6sx
  pinctrl/at91: Fix lockup when IRQ on PIOC and PIOD occurs
  pinctrl: msm: switch to using generic GPIO irqchip helpers
  pinctrl: sunxi: Fix multiple registration issue
  pinctrl: sunxi: Fix recursive dependency
  pinctrl: berlin: add the BG2CD pinctrl driver
  pinctrl: berlin: add the BG2 pinctrl driver
  pinctrl: berlin: add the BG2Q pinctrl driver
  ...
2014-06-03 11:20:32 -07:00
..
Kconfig pinctrl: sh-pfc: r8a7791 PFC support 2013-10-27 16:40:52 +01:00
Makefile pinctrl: sh-pfc: r8a7791 PFC support 2013-10-27 16:40:52 +01:00
core.c sh-pfc: Support GPIO to IRQ mapping specified IRQ resources 2013-12-12 22:07:28 +01:00
core.h sh-pfc: Support GPIO to IRQ mapping specified IRQ resources 2013-12-12 22:07:28 +01:00
gpio.c pinctrl: sh-pfc: Constify IRQ GPIOs arrays 2013-12-20 12:26:54 +01:00
pfc-r8a73a4.c pinctrl: sh-pfc: r8a73a4: Allow Multiplatform Build 2014-05-23 00:01:52 +02:00
pfc-r8a7740.c pinctrl: sh-pfc: r8a7740: Allow Multiplatform Build 2014-05-23 00:01:51 +02:00
pfc-r8a7778.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7779.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7790.c This is the bulk of pin control changes for the v3.16 2014-06-03 11:20:32 -07:00
pfc-r8a7791.c This is the bulk of pin control changes for the v3.16 2014-06-03 11:20:32 -07:00
pfc-sh73a0.c pinctrl: sh-pfc: sh73a0: Allow Multiplatform Build 2014-05-23 00:01:52 +02:00
pfc-sh7203.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7264.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7269.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7372.c Bulk pin control changes for the v3.14 cycle: 2014-01-21 10:14:10 -08:00
pfc-sh7720.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7722.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7723.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7724.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7734.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7757.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7785.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7786.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-shx3.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pinctrl.c pinctrl: Pass all configs to driver on pin_config_set() 2013-08-28 13:34:41 +02:00
sh_pfc.h pinctrl: sh-pfc: Don't set the pinmux_irq irq field for multiplatform 2014-05-23 00:01:51 +02:00