296 lines
6.1 KiB
C
296 lines
6.1 KiB
C
/*
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* TI CDCE949 clock synthesizer driver
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*
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* Note: This implementation assumes an input of 27MHz to the CDCE.
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* This is by no means constrained by CDCE hardware although the datasheet
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* does use this as an example for all illustrations and more importantly:
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* that is the crystal input on boards it is currently used on.
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*
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* Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <mach/clock.h>
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#include <mach/cdce949.h>
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#include "clock.h"
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static struct i2c_client *cdce_i2c_client;
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static DEFINE_MUTEX(cdce_mutex);
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/* CDCE register descriptor */
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struct cdce_reg {
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u8 addr;
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u8 val;
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};
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/* Per-Output (Y1, Y2 etc.) frequency descriptor */
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struct cdce_freq {
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/* Frequency in KHz */
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unsigned long frequency;
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/*
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* List of registers to program to obtain a particular frequency.
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* 0x0 in register address and value is the end of list marker.
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*/
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struct cdce_reg *reglist;
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};
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#define CDCE_FREQ_TABLE_ENTRY(line, out) \
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{ \
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.reglist = cdce_y ##line## _ ##out, \
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.frequency = out, \
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}
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/* List of CDCE outputs */
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struct cdce_output {
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/* List of frequencies on this output */
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struct cdce_freq *freq_table;
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/* Number of possible frequencies */
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int size;
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};
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/*
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* Finding out the values to program into CDCE949 registers for a particular
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* frequency output is not a simple calculation. Have a look at the datasheet
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* for the details. There is desktop software available to help users with
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* the calculations. Here, we just depend on the output of that software
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* (or hand calculations) instead trying to runtime calculate the register
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* values and inflicting misery on ourselves.
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*/
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static struct cdce_reg cdce_y1_148500[] = {
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{ 0x13, 0x00 },
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/* program PLL1_0 multiplier */
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{ 0x18, 0xaf },
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{ 0x19, 0x50 },
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{ 0x1a, 0x02 },
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{ 0x1b, 0xc9 },
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/* program PLL1_11 multiplier */
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{ 0x1c, 0x00 },
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{ 0x1d, 0x40 },
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{ 0x1e, 0x02 },
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{ 0x1f, 0xc9 },
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/* output state selection */
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{ 0x15, 0x00 },
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{ 0x14, 0xef },
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/* switch MUX to PLL1 output */
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{ 0x14, 0x6f },
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{ 0x16, 0x06 },
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/* set P2DIV divider, P3DIV and input crystal */
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{ 0x17, 0x06 },
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{ 0x01, 0x00 },
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{ 0x05, 0x48 },
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{ 0x02, 0x80 },
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/* enable and disable PLL */
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{ 0x02, 0xbc },
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{ 0x03, 0x01 },
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{ },
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};
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static struct cdce_reg cdce_y1_74250[] = {
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{ 0x13, 0x00 },
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{ 0x18, 0xaf },
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{ 0x19, 0x50 },
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{ 0x1a, 0x02 },
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{ 0x1b, 0xc9 },
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{ 0x1c, 0x00 },
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{ 0x1d, 0x40 },
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{ 0x1e, 0x02 },
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{ 0x1f, 0xc9 },
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/* output state selection */
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{ 0x15, 0x00 },
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{ 0x14, 0xef },
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/* switch MUX to PLL1 output */
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{ 0x14, 0x6f },
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{ 0x16, 0x06 },
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/* set P2DIV divider, P3DIV and input crystal */
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{ 0x17, 0x06 },
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{ 0x01, 0x00 },
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{ 0x05, 0x48 },
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{ 0x02, 0x80 },
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/* enable and disable PLL */
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{ 0x02, 0xbc },
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{ 0x03, 0x02 },
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{ },
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};
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static struct cdce_reg cdce_y1_27000[] = {
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{ 0x13, 0x00 },
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{ 0x18, 0x00 },
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{ 0x19, 0x40 },
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{ 0x1a, 0x02 },
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{ 0x1b, 0x08 },
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{ 0x1c, 0x00 },
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{ 0x1d, 0x40 },
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{ 0x1e, 0x02 },
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{ 0x1f, 0x08 },
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{ 0x15, 0x02 },
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{ 0x14, 0xed },
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{ 0x16, 0x01 },
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{ 0x17, 0x01 },
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{ 0x01, 0x00 },
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{ 0x05, 0x50 },
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{ 0x02, 0xb4 },
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{ 0x03, 0x01 },
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{ },
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};
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static struct cdce_freq cdce_y1_freqs[] = {
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CDCE_FREQ_TABLE_ENTRY(1, 148500),
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CDCE_FREQ_TABLE_ENTRY(1, 74250),
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CDCE_FREQ_TABLE_ENTRY(1, 27000),
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};
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static struct cdce_reg cdce_y5_13500[] = {
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{ 0x27, 0x08 },
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{ 0x28, 0x00 },
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{ 0x29, 0x40 },
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{ 0x2a, 0x02 },
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{ 0x2b, 0x08 },
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{ 0x24, 0x6f },
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{ },
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};
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static struct cdce_reg cdce_y5_16875[] = {
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{ 0x27, 0x08 },
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{ 0x28, 0x9f },
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{ 0x29, 0xb0 },
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{ 0x2a, 0x02 },
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{ 0x2b, 0x89 },
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{ 0x24, 0x6f },
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{ },
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};
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static struct cdce_reg cdce_y5_27000[] = {
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{ 0x27, 0x04 },
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{ 0x28, 0x00 },
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{ 0x29, 0x40 },
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{ 0x2a, 0x02 },
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{ 0x2b, 0x08 },
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{ 0x24, 0x6f },
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{ },
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};
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static struct cdce_reg cdce_y5_54000[] = {
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{ 0x27, 0x04 },
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{ 0x28, 0xff },
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{ 0x29, 0x80 },
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{ 0x2a, 0x02 },
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{ 0x2b, 0x07 },
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{ 0x24, 0x6f },
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{ },
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};
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static struct cdce_reg cdce_y5_81000[] = {
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{ 0x27, 0x02 },
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{ 0x28, 0xbf },
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{ 0x29, 0xa0 },
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{ 0x2a, 0x03 },
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{ 0x2b, 0x0a },
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{ 0x24, 0x6f },
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{ },
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};
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static struct cdce_freq cdce_y5_freqs[] = {
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CDCE_FREQ_TABLE_ENTRY(5, 13500),
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CDCE_FREQ_TABLE_ENTRY(5, 16875),
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CDCE_FREQ_TABLE_ENTRY(5, 27000),
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CDCE_FREQ_TABLE_ENTRY(5, 54000),
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CDCE_FREQ_TABLE_ENTRY(5, 81000),
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};
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static struct cdce_output output_list[] = {
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[1] = { cdce_y1_freqs, ARRAY_SIZE(cdce_y1_freqs) },
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[5] = { cdce_y5_freqs, ARRAY_SIZE(cdce_y5_freqs) },
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};
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int cdce_set_rate(struct clk *clk, unsigned long rate)
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{
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int i, ret = 0;
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struct cdce_freq *freq_table = output_list[clk->lpsc].freq_table;
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struct cdce_reg *regs = NULL;
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if (!cdce_i2c_client)
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return -ENODEV;
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if (!freq_table)
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return -EINVAL;
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for (i = 0; i < output_list[clk->lpsc].size; i++) {
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if (freq_table[i].frequency == rate / 1000) {
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regs = freq_table[i].reglist;
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break;
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}
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}
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if (!regs)
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return -EINVAL;
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mutex_lock(&cdce_mutex);
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for (i = 0; regs[i].addr; i++) {
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ret = i2c_smbus_write_byte_data(cdce_i2c_client,
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regs[i].addr | 0x80, regs[i].val);
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if (ret)
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break;
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}
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mutex_unlock(&cdce_mutex);
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if (!ret)
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clk->rate = rate;
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return ret;
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}
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static int cdce_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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cdce_i2c_client = client;
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return 0;
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}
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static int __devexit cdce_remove(struct i2c_client *client)
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{
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cdce_i2c_client = NULL;
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return 0;
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}
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static const struct i2c_device_id cdce_id[] = {
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{"cdce949", 0},
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{},
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};
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MODULE_DEVICE_TABLE(i2c, cdce_id);
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static struct i2c_driver cdce_driver = {
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.driver = {
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.owner = THIS_MODULE,
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.name = "cdce949",
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},
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.probe = cdce_probe,
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.remove = __devexit_p(cdce_remove),
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.id_table = cdce_id,
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};
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static int __init cdce_init(void)
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{
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return i2c_add_driver(&cdce_driver);
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}
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subsys_initcall(cdce_init);
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static void __exit cdce_exit(void)
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{
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i2c_del_driver(&cdce_driver);
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}
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module_exit(cdce_exit);
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MODULE_AUTHOR("Texas Instruments");
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MODULE_DESCRIPTION("CDCE949 clock synthesizer driver");
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MODULE_LICENSE("GPL v2");
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