491 lines
11 KiB
C
491 lines
11 KiB
C
/*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS5 INT clock frequency scaling support using DEVFREQ framework
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* Based on work done by Jonghwan Choi <jhbird.choi@samsung.com>
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* Support for only EXYNOS5250 is present.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/devfreq.h>
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#include <linux/io.h>
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#include <linux/pm_opp.h>
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#include <linux/slab.h>
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#include <linux/suspend.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/pm_qos.h>
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#include <linux/regulator/consumer.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include "exynos_ppmu.h"
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#define MAX_SAFEVOLT 1100000 /* 1.10V */
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/* Assume that the bus is saturated if the utilization is 25% */
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#define INT_BUS_SATURATION_RATIO 25
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enum int_level_idx {
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LV_0,
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LV_1,
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LV_2,
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LV_3,
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LV_4,
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_LV_END
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};
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enum exynos_ppmu_list {
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PPMU_RIGHT,
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PPMU_END,
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};
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struct busfreq_data_int {
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struct device *dev;
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struct devfreq *devfreq;
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struct regulator *vdd_int;
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struct exynos_ppmu ppmu[PPMU_END];
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unsigned long curr_freq;
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bool disabled;
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struct notifier_block pm_notifier;
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struct mutex lock;
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struct pm_qos_request int_req;
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struct clk *int_clk;
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};
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struct int_bus_opp_table {
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unsigned int idx;
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unsigned long clk;
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unsigned long volt;
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};
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static struct int_bus_opp_table exynos5_int_opp_table[] = {
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{LV_0, 266000, 1025000},
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{LV_1, 200000, 1025000},
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{LV_2, 160000, 1025000},
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{LV_3, 133000, 1025000},
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{LV_4, 100000, 1025000},
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{0, 0, 0},
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};
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static void busfreq_mon_reset(struct busfreq_data_int *data)
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{
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unsigned int i;
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for (i = PPMU_RIGHT; i < PPMU_END; i++) {
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void __iomem *ppmu_base = data->ppmu[i].hw_base;
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/* Reset the performance and cycle counters */
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exynos_ppmu_reset(ppmu_base);
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/* Setup count registers to monitor read/write transactions */
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data->ppmu[i].event[PPMU_PMNCNT3] = RDWR_DATA_COUNT;
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exynos_ppmu_setevent(ppmu_base, PPMU_PMNCNT3,
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data->ppmu[i].event[PPMU_PMNCNT3]);
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exynos_ppmu_start(ppmu_base);
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}
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}
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static void exynos5_read_ppmu(struct busfreq_data_int *data)
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{
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int i, j;
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for (i = PPMU_RIGHT; i < PPMU_END; i++) {
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void __iomem *ppmu_base = data->ppmu[i].hw_base;
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exynos_ppmu_stop(ppmu_base);
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/* Update local data from PPMU */
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data->ppmu[i].ccnt = __raw_readl(ppmu_base + PPMU_CCNT);
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for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
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if (data->ppmu[i].event[j] == 0)
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data->ppmu[i].count[j] = 0;
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else
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data->ppmu[i].count[j] =
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exynos_ppmu_read(ppmu_base, j);
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}
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}
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busfreq_mon_reset(data);
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}
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static int exynos5_int_setvolt(struct busfreq_data_int *data,
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unsigned long volt)
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{
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return regulator_set_voltage(data->vdd_int, volt, MAX_SAFEVOLT);
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}
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static int exynos5_busfreq_int_target(struct device *dev, unsigned long *_freq,
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u32 flags)
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{
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int err = 0;
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struct platform_device *pdev = container_of(dev, struct platform_device,
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dev);
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struct busfreq_data_int *data = platform_get_drvdata(pdev);
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struct dev_pm_opp *opp;
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unsigned long old_freq, freq;
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unsigned long volt;
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rcu_read_lock();
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opp = devfreq_recommended_opp(dev, _freq, flags);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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dev_err(dev, "%s: Invalid OPP.\n", __func__);
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return PTR_ERR(opp);
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}
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freq = dev_pm_opp_get_freq(opp);
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volt = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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old_freq = data->curr_freq;
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if (old_freq == freq)
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return 0;
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dev_dbg(dev, "targeting %lukHz %luuV\n", freq, volt);
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mutex_lock(&data->lock);
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if (data->disabled)
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goto out;
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if (freq > exynos5_int_opp_table[0].clk)
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pm_qos_update_request(&data->int_req, freq * 16 / 1000);
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else
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pm_qos_update_request(&data->int_req, -1);
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if (old_freq < freq)
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err = exynos5_int_setvolt(data, volt);
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if (err)
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goto out;
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err = clk_set_rate(data->int_clk, freq * 1000);
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if (err)
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goto out;
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if (old_freq > freq)
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err = exynos5_int_setvolt(data, volt);
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if (err)
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goto out;
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data->curr_freq = freq;
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out:
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mutex_unlock(&data->lock);
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return err;
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}
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static int exynos5_get_busier_dmc(struct busfreq_data_int *data)
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{
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int i, j;
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int busy = 0;
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unsigned int temp = 0;
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for (i = PPMU_RIGHT; i < PPMU_END; i++) {
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for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
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if (data->ppmu[i].count[j] > temp) {
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temp = data->ppmu[i].count[j];
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busy = i;
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}
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}
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}
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return busy;
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}
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static int exynos5_int_get_dev_status(struct device *dev,
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struct devfreq_dev_status *stat)
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{
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struct platform_device *pdev = container_of(dev, struct platform_device,
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dev);
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struct busfreq_data_int *data = platform_get_drvdata(pdev);
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int busier_dmc;
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exynos5_read_ppmu(data);
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busier_dmc = exynos5_get_busier_dmc(data);
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stat->current_frequency = data->curr_freq;
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/* Number of cycles spent on memory access */
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stat->busy_time = data->ppmu[busier_dmc].count[PPMU_PMNCNT3];
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stat->busy_time *= 100 / INT_BUS_SATURATION_RATIO;
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stat->total_time = data->ppmu[busier_dmc].ccnt;
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return 0;
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}
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static void exynos5_int_exit(struct device *dev)
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{
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struct platform_device *pdev = container_of(dev, struct platform_device,
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dev);
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struct busfreq_data_int *data = platform_get_drvdata(pdev);
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devfreq_unregister_opp_notifier(dev, data->devfreq);
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}
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static struct devfreq_dev_profile exynos5_devfreq_int_profile = {
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.initial_freq = 160000,
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.polling_ms = 100,
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.target = exynos5_busfreq_int_target,
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.get_dev_status = exynos5_int_get_dev_status,
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.exit = exynos5_int_exit,
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};
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static int exynos5250_init_int_tables(struct busfreq_data_int *data)
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{
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int i, err = 0;
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for (i = LV_0; i < _LV_END; i++) {
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err = dev_pm_opp_add(data->dev, exynos5_int_opp_table[i].clk,
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exynos5_int_opp_table[i].volt);
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if (err) {
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dev_err(data->dev, "Cannot add opp entries.\n");
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return err;
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}
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}
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return 0;
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}
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static int exynos5_busfreq_int_pm_notifier_event(struct notifier_block *this,
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unsigned long event, void *ptr)
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{
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struct busfreq_data_int *data = container_of(this,
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struct busfreq_data_int, pm_notifier);
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struct dev_pm_opp *opp;
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unsigned long maxfreq = ULONG_MAX;
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unsigned long freq;
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unsigned long volt;
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int err = 0;
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switch (event) {
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case PM_SUSPEND_PREPARE:
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/* Set Fastest and Deactivate DVFS */
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mutex_lock(&data->lock);
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data->disabled = true;
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_floor(data->dev, &maxfreq);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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err = PTR_ERR(opp);
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goto unlock;
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}
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freq = dev_pm_opp_get_freq(opp);
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volt = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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err = exynos5_int_setvolt(data, volt);
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if (err)
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goto unlock;
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err = clk_set_rate(data->int_clk, freq * 1000);
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if (err)
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goto unlock;
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data->curr_freq = freq;
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unlock:
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mutex_unlock(&data->lock);
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if (err)
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return NOTIFY_BAD;
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return NOTIFY_OK;
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case PM_POST_RESTORE:
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case PM_POST_SUSPEND:
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/* Reactivate */
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mutex_lock(&data->lock);
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data->disabled = false;
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mutex_unlock(&data->lock);
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return NOTIFY_OK;
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}
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return NOTIFY_DONE;
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}
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static int exynos5_busfreq_int_probe(struct platform_device *pdev)
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{
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struct busfreq_data_int *data;
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struct dev_pm_opp *opp;
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struct device *dev = &pdev->dev;
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struct device_node *np;
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unsigned long initial_freq;
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unsigned long initial_volt;
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int err = 0;
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int i;
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data = devm_kzalloc(&pdev->dev, sizeof(struct busfreq_data_int),
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GFP_KERNEL);
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if (data == NULL) {
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dev_err(dev, "Cannot allocate memory.\n");
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return -ENOMEM;
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}
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np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-ppmu");
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if (np == NULL) {
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pr_err("Unable to find PPMU node\n");
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return -ENOENT;
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}
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for (i = PPMU_RIGHT; i < PPMU_END; i++) {
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/* map PPMU memory region */
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data->ppmu[i].hw_base = of_iomap(np, i);
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if (data->ppmu[i].hw_base == NULL) {
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dev_err(&pdev->dev, "failed to map memory region\n");
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return -ENOMEM;
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}
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}
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data->pm_notifier.notifier_call = exynos5_busfreq_int_pm_notifier_event;
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data->dev = dev;
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mutex_init(&data->lock);
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err = exynos5250_init_int_tables(data);
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if (err)
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return err;
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data->vdd_int = devm_regulator_get(dev, "vdd_int");
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if (IS_ERR(data->vdd_int)) {
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dev_err(dev, "Cannot get the regulator \"vdd_int\"\n");
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return PTR_ERR(data->vdd_int);
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}
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data->int_clk = devm_clk_get(dev, "int_clk");
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if (IS_ERR(data->int_clk)) {
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dev_err(dev, "Cannot get clock \"int_clk\"\n");
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return PTR_ERR(data->int_clk);
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}
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_floor(dev,
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&exynos5_devfreq_int_profile.initial_freq);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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dev_err(dev, "Invalid initial frequency %lu kHz.\n",
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exynos5_devfreq_int_profile.initial_freq);
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return PTR_ERR(opp);
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}
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initial_freq = dev_pm_opp_get_freq(opp);
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initial_volt = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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data->curr_freq = initial_freq;
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err = clk_set_rate(data->int_clk, initial_freq * 1000);
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if (err) {
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dev_err(dev, "Failed to set initial frequency\n");
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return err;
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}
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err = exynos5_int_setvolt(data, initial_volt);
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if (err)
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return err;
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platform_set_drvdata(pdev, data);
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busfreq_mon_reset(data);
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data->devfreq = devfreq_add_device(dev, &exynos5_devfreq_int_profile,
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"simple_ondemand", NULL);
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if (IS_ERR(data->devfreq)) {
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err = PTR_ERR(data->devfreq);
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goto err_devfreq_add;
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}
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devfreq_register_opp_notifier(dev, data->devfreq);
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err = register_pm_notifier(&data->pm_notifier);
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if (err) {
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dev_err(dev, "Failed to setup pm notifier\n");
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goto err_devfreq_add;
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}
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/* TODO: Add a new QOS class for int/mif bus */
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pm_qos_add_request(&data->int_req, PM_QOS_NETWORK_THROUGHPUT, -1);
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return 0;
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err_devfreq_add:
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devfreq_remove_device(data->devfreq);
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return err;
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}
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static int exynos5_busfreq_int_remove(struct platform_device *pdev)
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{
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struct busfreq_data_int *data = platform_get_drvdata(pdev);
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pm_qos_remove_request(&data->int_req);
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unregister_pm_notifier(&data->pm_notifier);
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devfreq_remove_device(data->devfreq);
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return 0;
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}
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static int exynos5_busfreq_int_resume(struct device *dev)
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{
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struct platform_device *pdev = container_of(dev, struct platform_device,
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dev);
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struct busfreq_data_int *data = platform_get_drvdata(pdev);
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busfreq_mon_reset(data);
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return 0;
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}
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static const struct dev_pm_ops exynos5_busfreq_int_pm = {
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.resume = exynos5_busfreq_int_resume,
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};
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/* platform device pointer for exynos5 devfreq device. */
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static struct platform_device *exynos5_devfreq_pdev;
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static struct platform_driver exynos5_busfreq_int_driver = {
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.probe = exynos5_busfreq_int_probe,
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.remove = exynos5_busfreq_int_remove,
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.driver = {
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.name = "exynos5-bus-int",
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.owner = THIS_MODULE,
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.pm = &exynos5_busfreq_int_pm,
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},
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};
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static int __init exynos5_busfreq_int_init(void)
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{
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int ret;
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ret = platform_driver_register(&exynos5_busfreq_int_driver);
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if (ret < 0)
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goto out;
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exynos5_devfreq_pdev =
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platform_device_register_simple("exynos5-bus-int", -1, NULL, 0);
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if (IS_ERR(exynos5_devfreq_pdev)) {
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ret = PTR_ERR(exynos5_devfreq_pdev);
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goto out1;
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}
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return 0;
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out1:
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platform_driver_unregister(&exynos5_busfreq_int_driver);
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out:
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return ret;
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}
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late_initcall(exynos5_busfreq_int_init);
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static void __exit exynos5_busfreq_int_exit(void)
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{
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platform_device_unregister(exynos5_devfreq_pdev);
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platform_driver_unregister(&exynos5_busfreq_int_driver);
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}
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module_exit(exynos5_busfreq_int_exit);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("EXYNOS5 busfreq driver with devfreq framework");
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