158 lines
3.5 KiB
C
158 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PCIe controller EP driver for Freescale Layerscape SoCs
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*
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* Copyright (C) 2018 NXP Semiconductor.
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*
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* Author: Xiaowei Bao <xiaowei.bao@nxp.com>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/resource.h>
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#include "pcie-designware.h"
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#define PCIE_DBI2_OFFSET 0x1000 /* DBI2 base address*/
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struct ls_pcie_ep {
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struct dw_pcie *pci;
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};
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#define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev)
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static int ls_pcie_establish_link(struct dw_pcie *pci)
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{
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return 0;
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}
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static const struct dw_pcie_ops ls_pcie_ep_ops = {
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.start_link = ls_pcie_establish_link,
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};
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static const struct of_device_id ls_pcie_ep_of_match[] = {
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{ .compatible = "fsl,ls-pcie-ep",},
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{ },
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};
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static const struct pci_epc_features ls_pcie_epc_features = {
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.linkup_notifier = false,
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.msi_capable = true,
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.msix_capable = false,
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.bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
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};
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static const struct pci_epc_features*
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ls_pcie_ep_get_features(struct dw_pcie_ep *ep)
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{
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return &ls_pcie_epc_features;
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}
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static void ls_pcie_ep_init(struct dw_pcie_ep *ep)
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{
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struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
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enum pci_barno bar;
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for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
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dw_pcie_ep_reset_bar(pci, bar);
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}
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static int ls_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
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enum pci_epc_irq_type type, u16 interrupt_num)
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{
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struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
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switch (type) {
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case PCI_EPC_IRQ_LEGACY:
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return dw_pcie_ep_raise_legacy_irq(ep, func_no);
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case PCI_EPC_IRQ_MSI:
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return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
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case PCI_EPC_IRQ_MSIX:
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return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num);
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default:
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dev_err(pci->dev, "UNKNOWN IRQ type\n");
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return -EINVAL;
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}
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}
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static const struct dw_pcie_ep_ops pcie_ep_ops = {
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.ep_init = ls_pcie_ep_init,
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.raise_irq = ls_pcie_ep_raise_irq,
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.get_features = ls_pcie_ep_get_features,
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};
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static int __init ls_add_pcie_ep(struct ls_pcie_ep *pcie,
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struct platform_device *pdev)
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{
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struct dw_pcie *pci = pcie->pci;
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struct device *dev = pci->dev;
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struct dw_pcie_ep *ep;
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struct resource *res;
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int ret;
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ep = &pci->ep;
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ep->ops = &pcie_ep_ops;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space");
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if (!res)
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return -EINVAL;
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ep->phys_base = res->start;
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ep->addr_size = resource_size(res);
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ret = dw_pcie_ep_init(ep);
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if (ret) {
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dev_err(dev, "failed to initialize endpoint\n");
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return ret;
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}
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return 0;
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}
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static int __init ls_pcie_ep_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct dw_pcie *pci;
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struct ls_pcie_ep *pcie;
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struct resource *dbi_base;
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int ret;
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pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
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if (!pcie)
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return -ENOMEM;
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pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
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if (!pci)
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return -ENOMEM;
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dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
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pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
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if (IS_ERR(pci->dbi_base))
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return PTR_ERR(pci->dbi_base);
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pci->dbi_base2 = pci->dbi_base + PCIE_DBI2_OFFSET;
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pci->dev = dev;
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pci->ops = &ls_pcie_ep_ops;
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pcie->pci = pci;
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platform_set_drvdata(pdev, pcie);
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ret = ls_add_pcie_ep(pcie, pdev);
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return ret;
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}
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static struct platform_driver ls_pcie_ep_driver = {
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.driver = {
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.name = "layerscape-pcie-ep",
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.of_match_table = ls_pcie_ep_of_match,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver_probe(ls_pcie_ep_driver, ls_pcie_ep_probe);
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