John Crispin 61fa969f27 MIPS: lantiq: split up IRQ IM ranges ... Up to now all our SoCs had the 5 IM ranges in a consecutive order. To accomodate the SVIP we need to support IM ranges that are scattered inside the register range. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4237/		2012-08-23 00:08:17 +02:00
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dts	OF: MIPS: lantiq: implement OF support	2012-05-21 14:31:49 +01:00
falcon	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
xway	MIPS: Lantiq: Fix interface clock and PCI control register offset	2012-08-01 17:57:04 +02:00
Kconfig	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
Makefile	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
Platform	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
clk.c	MIPS: Lantiq: Platform specific CLK fixup	2012-08-01 17:58:09 +02:00
clk.h	MIPS: lantiq: implement support for clkdev api	2012-05-21 14:31:51 +01:00
early_printk.c	MIPS: lantiq: fix early printk	2012-05-15 17:49:22 +02:00
irq.c	MIPS: lantiq: split up IRQ IM ranges	2012-08-23 00:08:17 +02:00
prom.c	MIPS: Lantiq: Add device_tree_init function	2012-08-01 17:58:04 +02:00
prom.h	OF: MIPS: lantiq: implement OF support	2012-05-21 14:31:49 +01:00