Michael Cheng 61c5ed946d drm/i915/gt: replace cache_clflush_range ... Replace all occurrence of cache_clflush_range with drm_clflush_virt_range. This will prevent compile errors on non-x86 platforms. Signed-off-by: Michael Cheng <michael.cheng@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220321223819.72833-6-michael.cheng@intel.com		2022-03-22 10:10:53 -07:00
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drm	drm/i915/gt: replace cache_clflush_range	2022-03-22 10:10:53 -07:00
host1x	gpu: host1x: Add back arm_iommu_detach_device()	2021-12-16 14:28:51 +01:00
ipu-v3	media: i.MX6: Support 16-bit BT.1120 video input	2021-10-19 08:08:38 +01:00
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