298 lines
7.4 KiB
C
298 lines
7.4 KiB
C
/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Christian König
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*/
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#include <drm/drmP.h>
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#include "amdgpu.h"
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struct amdgpu_vram_mgr {
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struct drm_mm mm;
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spinlock_t lock;
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atomic64_t usage;
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atomic64_t vis_usage;
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};
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/**
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* amdgpu_vram_mgr_init - init VRAM manager and DRM MM
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*
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* @man: TTM memory type manager
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* @p_size: maximum size of VRAM
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*
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* Allocate and initialize the VRAM manager.
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*/
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static int amdgpu_vram_mgr_init(struct ttm_mem_type_manager *man,
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unsigned long p_size)
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{
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struct amdgpu_vram_mgr *mgr;
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mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
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if (!mgr)
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return -ENOMEM;
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drm_mm_init(&mgr->mm, 0, p_size);
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spin_lock_init(&mgr->lock);
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man->priv = mgr;
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return 0;
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}
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/**
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* amdgpu_vram_mgr_fini - free and destroy VRAM manager
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*
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* @man: TTM memory type manager
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*
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* Destroy and free the VRAM manager, returns -EBUSY if ranges are still
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* allocated inside it.
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*/
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static int amdgpu_vram_mgr_fini(struct ttm_mem_type_manager *man)
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{
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struct amdgpu_vram_mgr *mgr = man->priv;
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spin_lock(&mgr->lock);
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if (!drm_mm_clean(&mgr->mm)) {
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spin_unlock(&mgr->lock);
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return -EBUSY;
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}
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drm_mm_takedown(&mgr->mm);
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spin_unlock(&mgr->lock);
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kfree(mgr);
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man->priv = NULL;
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return 0;
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}
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/**
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* amdgpu_vram_mgr_vis_size - Calculate visible node size
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*
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* @adev: amdgpu device structure
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* @node: MM node structure
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*
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* Calculate how many bytes of the MM node are inside visible VRAM
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*/
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static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
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struct drm_mm_node *node)
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{
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uint64_t start = node->start << PAGE_SHIFT;
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uint64_t end = (node->size + node->start) << PAGE_SHIFT;
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if (start >= adev->mc.visible_vram_size)
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return 0;
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return (end > adev->mc.visible_vram_size ?
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adev->mc.visible_vram_size : end) - start;
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}
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/**
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* amdgpu_vram_mgr_new - allocate new ranges
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*
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* @man: TTM memory type manager
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* @tbo: TTM BO we need this range for
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* @place: placement flags and restrictions
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* @mem: the resulting mem object
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*
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* Allocate VRAM for the given BO.
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*/
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static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *tbo,
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const struct ttm_place *place,
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struct ttm_mem_reg *mem)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
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struct amdgpu_vram_mgr *mgr = man->priv;
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struct drm_mm *mm = &mgr->mm;
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struct drm_mm_node *nodes;
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enum drm_mm_insert_mode mode;
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unsigned long lpfn, num_nodes, pages_per_node, pages_left;
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uint64_t usage = 0, vis_usage = 0;
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unsigned i;
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int r;
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lpfn = place->lpfn;
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if (!lpfn)
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lpfn = man->size;
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if (place->flags & TTM_PL_FLAG_CONTIGUOUS ||
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amdgpu_vram_page_split == -1) {
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pages_per_node = ~0ul;
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num_nodes = 1;
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} else {
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pages_per_node = max((uint32_t)amdgpu_vram_page_split,
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mem->page_alignment);
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num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node);
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}
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nodes = kcalloc(num_nodes, sizeof(*nodes), GFP_KERNEL);
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if (!nodes)
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return -ENOMEM;
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mode = DRM_MM_INSERT_BEST;
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if (place->flags & TTM_PL_FLAG_TOPDOWN)
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mode = DRM_MM_INSERT_HIGH;
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mem->start = 0;
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pages_left = mem->num_pages;
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spin_lock(&mgr->lock);
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for (i = 0; i < num_nodes; ++i) {
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unsigned long pages = min(pages_left, pages_per_node);
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uint32_t alignment = mem->page_alignment;
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unsigned long start;
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if (pages == pages_per_node)
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alignment = pages_per_node;
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r = drm_mm_insert_node_in_range(mm, &nodes[i],
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pages, alignment, 0,
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place->fpfn, lpfn,
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mode);
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if (unlikely(r))
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goto error;
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usage += nodes[i].size << PAGE_SHIFT;
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vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]);
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/* Calculate a virtual BO start address to easily check if
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* everything is CPU accessible.
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*/
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start = nodes[i].start + nodes[i].size;
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if (start > mem->num_pages)
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start -= mem->num_pages;
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else
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start = 0;
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mem->start = max(mem->start, start);
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pages_left -= pages;
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}
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spin_unlock(&mgr->lock);
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atomic64_add(usage, &mgr->usage);
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atomic64_add(vis_usage, &mgr->vis_usage);
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mem->mm_node = nodes;
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return 0;
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error:
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while (i--)
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drm_mm_remove_node(&nodes[i]);
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spin_unlock(&mgr->lock);
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kfree(nodes);
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return r == -ENOSPC ? 0 : r;
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}
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/**
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* amdgpu_vram_mgr_del - free ranges
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*
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* @man: TTM memory type manager
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* @tbo: TTM BO we need this range for
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* @place: placement flags and restrictions
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* @mem: TTM memory object
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*
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* Free the allocated VRAM again.
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*/
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static void amdgpu_vram_mgr_del(struct ttm_mem_type_manager *man,
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struct ttm_mem_reg *mem)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
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struct amdgpu_vram_mgr *mgr = man->priv;
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struct drm_mm_node *nodes = mem->mm_node;
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uint64_t usage = 0, vis_usage = 0;
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unsigned pages = mem->num_pages;
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if (!mem->mm_node)
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return;
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spin_lock(&mgr->lock);
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while (pages) {
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pages -= nodes->size;
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drm_mm_remove_node(nodes);
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usage += nodes->size << PAGE_SHIFT;
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vis_usage += amdgpu_vram_mgr_vis_size(adev, nodes);
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++nodes;
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}
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spin_unlock(&mgr->lock);
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atomic64_sub(usage, &mgr->usage);
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atomic64_sub(vis_usage, &mgr->vis_usage);
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kfree(mem->mm_node);
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mem->mm_node = NULL;
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}
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/**
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* amdgpu_vram_mgr_usage - how many bytes are used in this domain
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*
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* @man: TTM memory type manager
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*
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* Returns how many bytes are used in this domain.
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*/
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uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man)
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{
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struct amdgpu_vram_mgr *mgr = man->priv;
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return atomic64_read(&mgr->usage);
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}
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/**
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* amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part
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*
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* @man: TTM memory type manager
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*
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* Returns how many bytes are used in the visible part of VRAM
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*/
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uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man)
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{
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struct amdgpu_vram_mgr *mgr = man->priv;
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return atomic64_read(&mgr->vis_usage);
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}
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/**
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* amdgpu_vram_mgr_debug - dump VRAM table
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*
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* @man: TTM memory type manager
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* @printer: DRM printer to use
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*
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* Dump the table content using printk.
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*/
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static void amdgpu_vram_mgr_debug(struct ttm_mem_type_manager *man,
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struct drm_printer *printer)
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{
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struct amdgpu_vram_mgr *mgr = man->priv;
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spin_lock(&mgr->lock);
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drm_mm_print(&mgr->mm, printer);
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spin_unlock(&mgr->lock);
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drm_printf(printer, "man size:%llu pages, ram usage:%lluMB, vis usage:%lluMB\n",
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man->size, amdgpu_vram_mgr_usage(man) >> 20,
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amdgpu_vram_mgr_vis_usage(man) >> 20);
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}
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const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func = {
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.init = amdgpu_vram_mgr_init,
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.takedown = amdgpu_vram_mgr_fini,
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.get_node = amdgpu_vram_mgr_new,
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.put_node = amdgpu_vram_mgr_del,
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.debug = amdgpu_vram_mgr_debug
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};
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