Sergio Paracuellos 1de16e38f1 staging: mt7621-pci: remove 'RALINK_PCI_IMBASEBAR0_ADDR' register ... Register 'RALINK_PCI_IMBASEBAR0_ADDR' contains internal memory base address for BAR0. We don't really need to write anything there at all since its initial value contains always a desired valid value. Hence remove register definition and related code. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20201123093637.8300-8-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2020-11-26 09:12:18 +01:00
..
Kconfig	MIPS: ralink: enable PCI support only if driver for mt7621 SoC is selected	2019-11-14 13:09:37 +08:00
Makefile	staging: add missing SPDX lines to Makefile files	2019-04-03 11:10:15 +02:00
TODO	staging: mt7621-pci: Update driver TODO file	2020-09-13 09:26:18 +02:00
mediatek,mt7621-pci.txt	staging: mt7621-pci: bindings: update doc accordly to last changes	2020-03-17 12:53:07 +01:00
pci-mt7621.c	staging: mt7621-pci: remove 'RALINK_PCI_IMBASEBAR0_ADDR' register	2020-11-26 09:12:18 +01:00