Dave Jiang ea9aadc06a dmaengine: idxd: fix wq cleanup of WQCFG registers ... A pre-release silicon erratum workaround where wq reset does not clear WQCFG registers was leaked into upstream code. Use wq reset command instead of blasting the MMIO region. This also address an issue where we clobber registers in future devices. Fixes: da32b28c95 ("dmaengine: idxd: cleanup workqueue config after disabling") Reported-by: Shreenivaas Devarajan <shreenivaas.devarajan@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/161824330020.881560.16375921906426627033.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2021-04-12 22:08:39 +05:30
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Makefile	dmaengine: idxd: add char driver to expose submission portal to userland	2020-01-24 11:18:45 +05:30
cdev.c	dmaengine: idxd: add IAX configuration support in the IDXD driver	2020-12-11 19:45:53 +05:30
device.c	dmaengine: idxd: fix wq cleanup of WQCFG registers	2021-04-12 22:08:39 +05:30
dma.c	dmaengine updates for v5.12-rc1	2021-02-23 15:05:10 -08:00
idxd.h	dmaengine: idxd: fix wq cleanup of WQCFG registers	2021-04-12 22:08:39 +05:30
init.c	dmaengine: idxd: clear MSIX permission entry on shutdown	2021-04-12 22:08:38 +05:30
irq.c	dmaengine: idxd: Fix clobbering of SWERR overflow bit on writeback	2021-04-12 13:26:03 +05:30
registers.h	dmaengine updates for v5.11-rc1	2020-12-17 12:52:23 -08:00
submit.c	dmaengine updates for v5.11-rc1	2020-12-17 12:52:23 -08:00
sysfs.c	dmaengine: idxd: fix wq cleanup of WQCFG registers	2021-04-12 22:08:39 +05:30