152 lines
4.9 KiB
C
152 lines
4.9 KiB
C
/*
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* Copyright © 2014-2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "intel_guc_ads.h"
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#include "intel_uc.h"
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#include "i915_drv.h"
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/*
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* The Additional Data Struct (ADS) has pointers for different buffers used by
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* the GuC. One single gem object contains the ADS struct itself (guc_ads), the
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* scheduling policies (guc_policies), a structure describing a collection of
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* register sets (guc_mmio_reg_state) and some extra pages for the GuC to save
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* its internal state for sleep.
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*/
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static void guc_policy_init(struct guc_policy *policy)
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{
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policy->execution_quantum = POLICY_DEFAULT_EXECUTION_QUANTUM_US;
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policy->preemption_time = POLICY_DEFAULT_PREEMPTION_TIME_US;
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policy->fault_time = POLICY_DEFAULT_FAULT_TIME_US;
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policy->policy_flags = 0;
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}
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static void guc_policies_init(struct guc_policies *policies)
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{
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struct guc_policy *policy;
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u32 p, i;
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policies->dpc_promote_time = POLICY_DEFAULT_DPC_PROMOTE_TIME_US;
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policies->max_num_work_items = POLICY_MAX_NUM_WI;
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for (p = 0; p < GUC_CLIENT_PRIORITY_NUM; p++) {
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for (i = GUC_RENDER_ENGINE; i < GUC_MAX_ENGINES_NUM; i++) {
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policy = &policies->policy[p][i];
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guc_policy_init(policy);
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}
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}
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policies->is_valid = 1;
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}
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/*
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* The first 80 dwords of the register state context, containing the
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* execlists and ppgtt registers.
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*/
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#define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))
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/**
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* intel_guc_ads_create() - creates GuC ADS
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* @guc: intel_guc struct
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*
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*/
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int intel_guc_ads_create(struct intel_guc *guc)
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{
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struct drm_i915_private *dev_priv = guc_to_i915(guc);
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struct i915_vma *vma, *kernel_ctx_vma;
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struct page *page;
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/* The ads obj includes the struct itself and buffers passed to GuC */
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struct {
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struct guc_ads ads;
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struct guc_policies policies;
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struct guc_mmio_reg_state reg_state;
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u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
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} __packed *blob;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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const u32 skipped_offset = LRC_HEADER_PAGES * PAGE_SIZE;
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const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
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u32 base;
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GEM_BUG_ON(guc->ads_vma);
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vma = intel_guc_allocate_vma(guc, PAGE_ALIGN(sizeof(*blob)));
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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guc->ads_vma = vma;
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page = i915_vma_first_page(vma);
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blob = kmap(page);
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/* GuC scheduling policies */
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guc_policies_init(&blob->policies);
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/* MMIO reg state */
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for_each_engine(engine, dev_priv, id) {
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blob->reg_state.white_list[engine->guc_id].mmio_start =
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engine->mmio_base + GUC_MMIO_WHITE_LIST_START;
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/* Nothing to be saved or restored for now. */
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blob->reg_state.white_list[engine->guc_id].count = 0;
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}
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/*
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* The GuC requires a "Golden Context" when it reinitialises
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* engines after a reset. Here we use the Render ring default
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* context, which must already exist and be pinned in the GGTT,
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* so its address won't change after we've told the GuC where
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* to find it. Note that we have to skip our header (1 page),
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* because our GuC shared data is there.
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*/
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kernel_ctx_vma = dev_priv->kernel_context->engine[RCS].state;
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blob->ads.golden_context_lrca =
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intel_guc_ggtt_offset(guc, kernel_ctx_vma) + skipped_offset;
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/*
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* The GuC expects us to exclude the portion of the context image that
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* it skips from the size it is to read. It starts reading from after
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* the execlist context (so skipping the first page [PPHWSP] and 80
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* dwords). Weird guc is weird.
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*/
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for_each_engine(engine, dev_priv, id)
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blob->ads.eng_state_size[engine->guc_id] =
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engine->context_size - skipped_size;
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base = intel_guc_ggtt_offset(guc, vma);
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blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
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blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
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blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
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kunmap(page);
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return 0;
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}
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void intel_guc_ads_destroy(struct intel_guc *guc)
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{
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i915_vma_unpin_and_release(&guc->ads_vma);
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}
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