Thierry Reding 5d089d42bc ARM: tegra: Add SOR0_OUT clock on Tegra124 ... This clock is needed for eDP to properly function, so add it to the SOR device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>		2019-10-29 20:29:14 +01:00
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bootp	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
compressed	ARM: 8894/1: boot: Replace open-coded nop with macro	2019-08-23 11:39:30 +01:00
dts	ARM: tegra: Add SOR0_OUT clock on Tegra124	2019-10-29 20:29:14 +01:00
.gitignore	…
Makefile	…
deflate_xip_data.sh	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
install.sh	…