221 lines
8.0 KiB
C
221 lines
8.0 KiB
C
/*
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* snd_sst_tokens.h - Intel SST tokens definition
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*
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* Copyright (C) 2016 Intel Corp
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* Author: Shreyas NC <shreyas.nc@intel.com>
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef __SND_SST_TOKENS_H__
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#define __SND_SST_TOKENS_H__
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/**
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* %SKL_TKN_UUID: Module UUID
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*
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* %SKL_TKN_U8_BLOCK_TYPE: Type of the private data block.Can be:
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* tuples, bytes, short and words
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*
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* %SKL_TKN_U8_IN_PIN_TYPE: Input pin type,
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* homogenous=0, heterogenous=1
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*
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* %SKL_TKN_U8_OUT_PIN_TYPE: Output pin type,
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* homogenous=0, heterogenous=1
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* %SKL_TKN_U8_DYN_IN_PIN: Configure Input pin dynamically
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* if true
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*
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* %SKL_TKN_U8_DYN_OUT_PIN: Configure Output pin dynamically
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* if true
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*
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* %SKL_TKN_U8_IN_QUEUE_COUNT: Store the number of Input pins
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*
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* %SKL_TKN_U8_OUT_QUEUE_COUNT: Store the number of Output pins
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*
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* %SKL_TKN_U8_TIME_SLOT: TDM slot number
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*
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* %SKL_TKN_U8_CORE_ID: Stores module affinity value.Can take
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* the values:
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* SKL_AFFINITY_CORE_0 = 0,
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* SKL_AFFINITY_CORE_1,
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* SKL_AFFINITY_CORE_MAX
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*
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* %SKL_TKN_U8_MOD_TYPE: Module type value.
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*
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* %SKL_TKN_U8_CONN_TYPE: Module connection type can be a FE,
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* BE or NONE as defined :
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* SKL_PIPE_CONN_TYPE_NONE = 0,
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* SKL_PIPE_CONN_TYPE_FE = 1 (HOST_DMA)
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* SKL_PIPE_CONN_TYPE_BE = 2 (LINK_DMA)
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*
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* %SKL_TKN_U8_DEV_TYPE: Type of device to which the module is
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* connected
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* Can take the values:
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* SKL_DEVICE_BT = 0x0,
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* SKL_DEVICE_DMIC = 0x1,
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* SKL_DEVICE_I2S = 0x2,
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* SKL_DEVICE_SLIMBUS = 0x3,
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* SKL_DEVICE_HDALINK = 0x4,
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* SKL_DEVICE_HDAHOST = 0x5,
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* SKL_DEVICE_NONE
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*
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* %SKL_TKN_U8_HW_CONN_TYPE: Connection type of the HW to which the
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* module is connected
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* SKL_CONN_NONE = 0,
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* SKL_CONN_SOURCE = 1,
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* SKL_CONN_SINK = 2
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*
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* %SKL_TKN_U16_PIN_INST_ID: Stores the pin instance id
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*
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* %SKL_TKN_U16_MOD_INST_ID: Stores the mdule instance id
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*
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* %SKL_TKN_U32_MAX_MCPS: Module max mcps value
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*
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* %SKL_TKN_U32_MEM_PAGES: Module resource pages
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*
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* %SKL_TKN_U32_OBS: Stores Output Buffer size
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*
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* %SKL_TKN_U32_IBS: Stores input buffer size
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*
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* %SKL_TKN_U32_VBUS_ID: Module VBUS_ID. PDM=0, SSP0=0,
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* SSP1=1,SSP2=2,
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* SSP3=3, SSP4=4,
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* SSP5=5, SSP6=6,INVALID
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*
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* %SKL_TKN_U32_PARAMS_FIXUP: Module Params fixup mask
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* %SKL_TKN_U32_CONVERTER: Module params converter mask
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* %SKL_TKN_U32_PIPE_ID: Stores the pipe id
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*
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* %SKL_TKN_U32_PIPE_CONN_TYPE: Type of the token to which the pipe is
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* connected to. It can be
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* SKL_PIPE_CONN_TYPE_NONE = 0,
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* SKL_PIPE_CONN_TYPE_FE = 1 (HOST_DMA),
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* SKL_PIPE_CONN_TYPE_BE = 2 (LINK_DMA),
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*
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* %SKL_TKN_U32_PIPE_PRIORITY: Pipe priority value
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* %SKL_TKN_U32_PIPE_MEM_PGS: Pipe resource pages
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*
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* %SKL_TKN_U32_DIR_PIN_COUNT: Value for the direction to set input/output
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* formats and the pin count.
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* The first 4 bits have the direction
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* value and the next 4 have
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* the pin count value.
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* SKL_DIR_IN = 0, SKL_DIR_OUT = 1.
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* The input and output formats
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* share the same set of tokens
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* with the distinction between input
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* and output made by reading direction
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* token.
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*
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* %SKL_TKN_U32_FMT_CH: Supported channel count
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*
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* %SKL_TKN_U32_FMT_FREQ: Supported frequency/sample rate
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*
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* %SKL_TKN_U32_FMT_BIT_DEPTH: Supported container size
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*
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* %SKL_TKN_U32_FMT_SAMPLE_SIZE:Number of samples in the container
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*
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* %SKL_TKN_U32_FMT_CH_CONFIG: Supported channel configurations for the
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* input/output.
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*
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* %SKL_TKN_U32_FMT_INTERLEAVE: Interleaving style which can be per
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* channel or per sample. The values can be :
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* SKL_INTERLEAVING_PER_CHANNEL = 0,
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* SKL_INTERLEAVING_PER_SAMPLE = 1,
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*
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* %SKL_TKN_U32_FMT_SAMPLE_TYPE:
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* Specifies the sample type. Can take the
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* values: SKL_SAMPLE_TYPE_INT_MSB = 0,
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* SKL_SAMPLE_TYPE_INT_LSB = 1,
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* SKL_SAMPLE_TYPE_INT_SIGNED = 2,
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* SKL_SAMPLE_TYPE_INT_UNSIGNED = 3,
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* SKL_SAMPLE_TYPE_FLOAT = 4
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*
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* %SKL_TKN_U32_CH_MAP: Channel map values
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* %SKL_TKN_U32_MOD_SET_PARAMS: It can take these values:
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* SKL_PARAM_DEFAULT, SKL_PARAM_INIT,
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* SKL_PARAM_SET, SKL_PARAM_BIND
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*
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* %SKL_TKN_U32_MOD_PARAM_ID: ID of the module params
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*
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* %SKL_TKN_U32_CAPS_SET_PARAMS:
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* Set params value
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*
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* %SKL_TKN_U32_CAPS_PARAMS_ID: Params ID
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*
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* %SKL_TKN_U32_CAPS_SIZE: Caps size
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*
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* %SKL_TKN_U32_PROC_DOMAIN: Specify processing domain
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*
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* %SKL_TKN_U32_LIB_COUNT: Specifies the number of libraries
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*
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* %SKL_TKN_STR_LIB_NAME: Specifies the library name
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*
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* %SKL_TKN_U32_PMODE: Specifies the power mode for pipe
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*
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* %SKL_TKL_U32_D0I3_CAPS: Specifies the D0i3 capability for module
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*
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* module_id and loadable flags dont have tokens as these values will be
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* read from the DSP FW manifest
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*/
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enum SKL_TKNS {
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SKL_TKN_UUID = 1,
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SKL_TKN_U8_NUM_BLOCKS,
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SKL_TKN_U8_BLOCK_TYPE,
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SKL_TKN_U8_IN_PIN_TYPE,
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SKL_TKN_U8_OUT_PIN_TYPE,
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SKL_TKN_U8_DYN_IN_PIN,
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SKL_TKN_U8_DYN_OUT_PIN,
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SKL_TKN_U8_IN_QUEUE_COUNT,
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SKL_TKN_U8_OUT_QUEUE_COUNT,
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SKL_TKN_U8_TIME_SLOT,
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SKL_TKN_U8_CORE_ID,
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SKL_TKN_U8_MOD_TYPE,
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SKL_TKN_U8_CONN_TYPE,
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SKL_TKN_U8_DEV_TYPE,
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SKL_TKN_U8_HW_CONN_TYPE,
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SKL_TKN_U16_MOD_INST_ID,
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SKL_TKN_U16_BLOCK_SIZE,
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SKL_TKN_U32_MAX_MCPS,
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SKL_TKN_U32_MEM_PAGES,
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SKL_TKN_U32_OBS,
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SKL_TKN_U32_IBS,
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SKL_TKN_U32_VBUS_ID,
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SKL_TKN_U32_PARAMS_FIXUP,
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SKL_TKN_U32_CONVERTER,
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SKL_TKN_U32_PIPE_ID,
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SKL_TKN_U32_PIPE_CONN_TYPE,
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SKL_TKN_U32_PIPE_PRIORITY,
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SKL_TKN_U32_PIPE_MEM_PGS,
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SKL_TKN_U32_DIR_PIN_COUNT,
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SKL_TKN_U32_FMT_CH,
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SKL_TKN_U32_FMT_FREQ,
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SKL_TKN_U32_FMT_BIT_DEPTH,
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SKL_TKN_U32_FMT_SAMPLE_SIZE,
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SKL_TKN_U32_FMT_CH_CONFIG,
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SKL_TKN_U32_FMT_INTERLEAVE,
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SKL_TKN_U32_FMT_SAMPLE_TYPE,
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SKL_TKN_U32_FMT_CH_MAP,
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SKL_TKN_U32_PIN_MOD_ID,
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SKL_TKN_U32_PIN_INST_ID,
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SKL_TKN_U32_MOD_SET_PARAMS,
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SKL_TKN_U32_MOD_PARAM_ID,
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SKL_TKN_U32_CAPS_SET_PARAMS,
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SKL_TKN_U32_CAPS_PARAMS_ID,
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SKL_TKN_U32_CAPS_SIZE,
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SKL_TKN_U32_PROC_DOMAIN,
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SKL_TKN_U32_LIB_COUNT,
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SKL_TKN_STR_LIB_NAME,
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SKL_TKN_U32_PMODE,
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SKL_TKL_U32_D0I3_CAPS,
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SKL_TKN_MAX = SKL_TKL_U32_D0I3_CAPS,
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};
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#endif
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