224 lines
5.7 KiB
C
224 lines
5.7 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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* Martin Peres
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*/
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#include "priv.h"
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struct nv40_therm_priv {
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struct nvkm_therm_priv base;
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};
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enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 };
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static enum nv40_sensor_style
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nv40_sensor_style(struct nvkm_therm *therm)
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{
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struct nvkm_device *device = nv_device(therm);
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switch (device->chipset) {
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case 0x43:
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case 0x44:
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case 0x4a:
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case 0x47:
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return OLD_STYLE;
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case 0x46:
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case 0x49:
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case 0x4b:
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case 0x4e:
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case 0x4c:
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case 0x67:
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case 0x68:
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case 0x63:
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return NEW_STYLE;
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default:
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return INVALID_STYLE;
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}
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}
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static int
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nv40_sensor_setup(struct nvkm_therm *therm)
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{
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enum nv40_sensor_style style = nv40_sensor_style(therm);
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/* enable ADC readout and disable the ALARM threshold */
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if (style == NEW_STYLE) {
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nv_mask(therm, 0x15b8, 0x80000000, 0);
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nv_wr32(therm, 0x15b0, 0x80003fff);
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mdelay(20); /* wait for the temperature to stabilize */
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return nv_rd32(therm, 0x15b4) & 0x3fff;
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} else if (style == OLD_STYLE) {
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nv_wr32(therm, 0x15b0, 0xff);
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mdelay(20); /* wait for the temperature to stabilize */
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return nv_rd32(therm, 0x15b4) & 0xff;
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} else
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return -ENODEV;
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}
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static int
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nv40_temp_get(struct nvkm_therm *therm)
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{
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struct nvkm_therm_priv *priv = (void *)therm;
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struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
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enum nv40_sensor_style style = nv40_sensor_style(therm);
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int core_temp;
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if (style == NEW_STYLE) {
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nv_wr32(therm, 0x15b0, 0x80003fff);
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core_temp = nv_rd32(therm, 0x15b4) & 0x3fff;
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} else if (style == OLD_STYLE) {
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nv_wr32(therm, 0x15b0, 0xff);
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core_temp = nv_rd32(therm, 0x15b4) & 0xff;
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} else
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return -ENODEV;
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/* if the slope or the offset is unset, do no use the sensor */
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if (!sensor->slope_div || !sensor->slope_mult ||
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!sensor->offset_num || !sensor->offset_den)
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return -ENODEV;
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core_temp = core_temp * sensor->slope_mult / sensor->slope_div;
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core_temp = core_temp + sensor->offset_num / sensor->offset_den;
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core_temp = core_temp + sensor->offset_constant - 8;
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/* reserve negative temperatures for errors */
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if (core_temp < 0)
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core_temp = 0;
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return core_temp;
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}
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static int
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nv40_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
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{
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u32 mask = enable ? 0x80000000 : 0x0000000;
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if (line == 2) nv_mask(therm, 0x0010f0, 0x80000000, mask);
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else if (line == 9) nv_mask(therm, 0x0015f4, 0x80000000, mask);
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else {
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nv_error(therm, "unknown pwm ctrl for gpio %d\n", line);
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return -ENODEV;
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}
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return 0;
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}
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static int
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nv40_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
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{
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if (line == 2) {
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u32 reg = nv_rd32(therm, 0x0010f0);
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if (reg & 0x80000000) {
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*duty = (reg & 0x7fff0000) >> 16;
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*divs = (reg & 0x00007fff);
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return 0;
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}
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} else
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if (line == 9) {
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u32 reg = nv_rd32(therm, 0x0015f4);
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if (reg & 0x80000000) {
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*divs = nv_rd32(therm, 0x0015f8);
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*duty = (reg & 0x7fffffff);
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return 0;
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}
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} else {
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nv_error(therm, "unknown pwm ctrl for gpio %d\n", line);
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return -ENODEV;
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}
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return -EINVAL;
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}
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static int
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nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
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{
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if (line == 2) {
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nv_mask(therm, 0x0010f0, 0x7fff7fff, (duty << 16) | divs);
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} else
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if (line == 9) {
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nv_wr32(therm, 0x0015f8, divs);
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nv_mask(therm, 0x0015f4, 0x7fffffff, duty);
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} else {
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nv_error(therm, "unknown pwm ctrl for gpio %d\n", line);
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return -ENODEV;
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}
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return 0;
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}
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void
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nv40_therm_intr(struct nvkm_subdev *subdev)
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{
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struct nvkm_therm *therm = nvkm_therm(subdev);
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uint32_t stat = nv_rd32(therm, 0x1100);
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/* traitement */
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/* ack all IRQs */
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nv_wr32(therm, 0x1100, 0x70000);
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nv_error(therm, "THERM received an IRQ: stat = %x\n", stat);
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}
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static int
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nv40_therm_ctor(struct nvkm_object *parent,
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struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct nv40_therm_priv *priv;
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int ret;
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ret = nvkm_therm_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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if (ret)
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return ret;
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priv->base.base.pwm_ctrl = nv40_fan_pwm_ctrl;
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priv->base.base.pwm_get = nv40_fan_pwm_get;
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priv->base.base.pwm_set = nv40_fan_pwm_set;
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priv->base.base.temp_get = nv40_temp_get;
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priv->base.sensor.program_alarms = nvkm_therm_program_alarms_polling;
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nv_subdev(priv)->intr = nv40_therm_intr;
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return nvkm_therm_preinit(&priv->base.base);
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}
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static int
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nv40_therm_init(struct nvkm_object *object)
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{
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struct nvkm_therm *therm = (void *)object;
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nv40_sensor_setup(therm);
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return _nvkm_therm_init(object);
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}
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struct nvkm_oclass
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nv40_therm_oclass = {
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.handle = NV_SUBDEV(THERM, 0x40),
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.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = nv40_therm_ctor,
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.dtor = _nvkm_therm_dtor,
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.init = nv40_therm_init,
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.fini = _nvkm_therm_fini,
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},
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};
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