58d4fafd0b
Add the following new features: - Generic CPU topology description support for DT-based platforms, including ARM64, ARM and RISC-V. - Sparsemem support - Perf callchain support - SiFive PLIC irqchip modifications, in preparation for M-mode Linux and clean up the code base: - Clean up chip-specific register (CSR) manipulation code, IPIs, TLB flushing, and the RISC-V CPU-local timer code - Kbuild cleanup from one of the Kbuild maintainers -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl1/pGEACgkQx4+xDQu9 Kkvkyw/9GulLK2yeXG8SoXiXWZAhrgUn487GM87BJXFwXkjDCRvYVk4RD8BKfOGt w1td6BXK5PjceH+d2m3kHa1aBQwT7sgsfQD0mBiHQ7TG+CMHMPV31eqjgIgnklEY f6bRl4JGokanPnLWE8tnQrMpu91kDI0XS2pnnQNNrAK3DbWocsdUIei14+auwygp Djbwssb8R/5RQdFO1dRa+0dWo1omzCJBgkMQBXipvD/z7u8BApioYdEUN1pEg6Yg YLdVtBUIF5gXIsq9jdqEZHWzvTPnq+5HZPy8pAYe/fPcnga89fCfgpWA9DfqjIEA bNFHJJKWc/lFAcMmXWWkYwgIbx8PUiktdv27S/DYLdyZ4SIX5YEtmdD6aK4ZStQT ZQcvCMDq9C3Y4s1PIwl9ORI8aVs3k1cI4Ee0xWS/x6D9h/84Ky1uBFgrPXai2G6q AUxnu0zWhllNahxp+rvUh0rnfHOMalaTG8eUb1GEoLzFcRhKYrKWLgFG/eBCAiit dofD24KpYSpZNrhZWgVUuE0Jcc58JSHp/LzDUloR2AcAvdxyQZ2Vd+vwE5BGGTzR t/V4zjSvndXUxFBVe28zHO2qrDzA+jUE8d+vO8w+lDGjbITYYZwIJPBL3f8Z0s6b wQWBwWlM4ZATqR662sBpz8P/t+RCcTMfLlatIV/07GRerjvPrd8= =N9WW -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Paul Walmsley: "Add the following new features: - Generic CPU topology description support for DT-based platforms, including ARM64, ARM and RISC-V. - Sparsemem support - Perf callchain support - SiFive PLIC irqchip modifications, in preparation for M-mode Linux and clean up the code base: - Clean up chip-specific register (CSR) manipulation code, IPIs, TLB flushing, and the RISC-V CPU-local timer code - Kbuild cleanup from one of the Kbuild maintainers" [ The CPU topology parts came in through the arm64 tree with a shared branch - Linus ] * tag 'riscv/for-v5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: irqchip/sifive-plic: set max threshold for ignored handlers riscv: move the TLB flush logic out of line riscv: don't use the rdtime(h) pseudo-instructions riscv: cleanup riscv_cpuid_to_hartid_mask riscv: optimize send_ipi_single riscv: cleanup send_ipi_mask riscv: refactor the IPI code riscv: Add support for libdw riscv: Add support for perf registers sampling riscv: Add perf callchain support riscv: add arch/riscv/Kbuild RISC-V: Implement sparsemem riscv: Using CSR numbers to access CSRs |
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Documentation | ||
LICENSES | ||
arch | ||
block | ||
certs | ||
crypto | ||
drivers | ||
fs | ||
include | ||
init | ||
ipc | ||
kernel | ||
lib | ||
mm | ||
net | ||
samples | ||
scripts | ||
security | ||
sound | ||
tools | ||
usr | ||
virt | ||
.clang-format | ||
.cocciconfig | ||
.get_maintainer.ignore | ||
.gitattributes | ||
.gitignore | ||
.mailmap | ||
COPYING | ||
CREDITS | ||
Kbuild | ||
Kconfig | ||
MAINTAINERS | ||
Makefile | ||
README |
README
Linux kernel ============ There are several guides for kernel developers and users. These guides can be rendered in a number of formats, like HTML and PDF. Please read Documentation/admin-guide/README.rst first. In order to build the documentation, use ``make htmldocs`` or ``make pdfdocs``. The formatted documentation can also be read online at: https://www.kernel.org/doc/html/latest/ There are various text files in the Documentation/ subdirectory, several of them using the Restructured Text markup notation. Please read the Documentation/process/changes.rst file, as it contains the requirements for building and running the kernel, and information about the problems which may result by upgrading your kernel.