434 lines
12 KiB
C
434 lines
12 KiB
C
/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2008 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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/*
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* Small helper utilities.
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*/
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#include <linux/kernel.h>
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#include <asm/octeon/octeon.h>
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#include <asm/octeon/cvmx-config.h>
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#include <asm/octeon/cvmx-fpa.h>
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#include <asm/octeon/cvmx-pip.h>
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#include <asm/octeon/cvmx-pko.h>
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#include <asm/octeon/cvmx-ipd.h>
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#include <asm/octeon/cvmx-spi.h>
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#include <asm/octeon/cvmx-helper.h>
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#include <asm/octeon/cvmx-helper-util.h>
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#include <asm/octeon/cvmx-ipd-defs.h>
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/**
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* Convert a interface mode into a human readable string
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*
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* @mode: Mode to convert
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*
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* Returns String
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*/
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const char *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t
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mode)
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{
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switch (mode) {
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case CVMX_HELPER_INTERFACE_MODE_DISABLED:
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return "DISABLED";
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case CVMX_HELPER_INTERFACE_MODE_RGMII:
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return "RGMII";
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case CVMX_HELPER_INTERFACE_MODE_GMII:
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return "GMII";
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case CVMX_HELPER_INTERFACE_MODE_SPI:
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return "SPI";
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case CVMX_HELPER_INTERFACE_MODE_PCIE:
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return "PCIE";
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case CVMX_HELPER_INTERFACE_MODE_XAUI:
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return "XAUI";
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case CVMX_HELPER_INTERFACE_MODE_SGMII:
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return "SGMII";
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case CVMX_HELPER_INTERFACE_MODE_PICMG:
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return "PICMG";
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case CVMX_HELPER_INTERFACE_MODE_NPI:
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return "NPI";
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case CVMX_HELPER_INTERFACE_MODE_LOOP:
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return "LOOP";
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}
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return "UNKNOWN";
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}
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/**
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* Debug routine to dump the packet structure to the console
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*
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* @work: Work queue entry containing the packet to dump
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* Returns
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*/
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int cvmx_helper_dump_packet(cvmx_wqe_t *work)
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{
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uint64_t count;
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uint64_t remaining_bytes;
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union cvmx_buf_ptr buffer_ptr;
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uint64_t start_of_buffer;
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uint8_t *data_address;
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uint8_t *end_of_data;
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cvmx_dprintf("Packet Length: %u\n", work->len);
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cvmx_dprintf(" Input Port: %u\n", work->ipprt);
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cvmx_dprintf(" QoS: %u\n", work->qos);
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cvmx_dprintf(" Buffers: %u\n", work->word2.s.bufs);
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if (work->word2.s.bufs == 0) {
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union cvmx_ipd_wqe_fpa_queue wqe_pool;
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wqe_pool.u64 = cvmx_read_csr(CVMX_IPD_WQE_FPA_QUEUE);
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buffer_ptr.u64 = 0;
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buffer_ptr.s.pool = wqe_pool.s.wqe_pool;
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buffer_ptr.s.size = 128;
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buffer_ptr.s.addr = cvmx_ptr_to_phys(work->packet_data);
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if (likely(!work->word2.s.not_IP)) {
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union cvmx_pip_ip_offset pip_ip_offset;
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pip_ip_offset.u64 = cvmx_read_csr(CVMX_PIP_IP_OFFSET);
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buffer_ptr.s.addr +=
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(pip_ip_offset.s.offset << 3) -
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work->word2.s.ip_offset;
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buffer_ptr.s.addr += (work->word2.s.is_v6 ^ 1) << 2;
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} else {
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/*
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* WARNING: This code assumes that the packet
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* is not RAW. If it was, we would use
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* PIP_GBL_CFG[RAW_SHF] instead of
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* PIP_GBL_CFG[NIP_SHF].
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*/
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union cvmx_pip_gbl_cfg pip_gbl_cfg;
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pip_gbl_cfg.u64 = cvmx_read_csr(CVMX_PIP_GBL_CFG);
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buffer_ptr.s.addr += pip_gbl_cfg.s.nip_shf;
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}
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} else
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buffer_ptr = work->packet_ptr;
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remaining_bytes = work->len;
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while (remaining_bytes) {
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start_of_buffer =
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((buffer_ptr.s.addr >> 7) - buffer_ptr.s.back) << 7;
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cvmx_dprintf(" Buffer Start:%llx\n",
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(unsigned long long)start_of_buffer);
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cvmx_dprintf(" Buffer I : %u\n", buffer_ptr.s.i);
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cvmx_dprintf(" Buffer Back: %u\n", buffer_ptr.s.back);
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cvmx_dprintf(" Buffer Pool: %u\n", buffer_ptr.s.pool);
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cvmx_dprintf(" Buffer Data: %llx\n",
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(unsigned long long)buffer_ptr.s.addr);
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cvmx_dprintf(" Buffer Size: %u\n", buffer_ptr.s.size);
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cvmx_dprintf("\t\t");
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data_address = (uint8_t *) cvmx_phys_to_ptr(buffer_ptr.s.addr);
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end_of_data = data_address + buffer_ptr.s.size;
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count = 0;
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while (data_address < end_of_data) {
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if (remaining_bytes == 0)
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break;
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else
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remaining_bytes--;
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cvmx_dprintf("%02x", (unsigned int)*data_address);
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data_address++;
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if (remaining_bytes && (count == 7)) {
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cvmx_dprintf("\n\t\t");
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count = 0;
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} else
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count++;
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}
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cvmx_dprintf("\n");
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if (remaining_bytes)
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buffer_ptr = *(union cvmx_buf_ptr *)
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cvmx_phys_to_ptr(buffer_ptr.s.addr - 8);
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}
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return 0;
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}
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/**
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* Setup Random Early Drop on a specific input queue
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*
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* @queue: Input queue to setup RED on (0-7)
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* @pass_thresh:
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* Packets will begin slowly dropping when there are less than
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* this many packet buffers free in FPA 0.
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* @drop_thresh:
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* All incomming packets will be dropped when there are less
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* than this many free packet buffers in FPA 0.
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* Returns Zero on success. Negative on failure
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*/
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int cvmx_helper_setup_red_queue(int queue, int pass_thresh, int drop_thresh)
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{
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union cvmx_ipd_qosx_red_marks red_marks;
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union cvmx_ipd_red_quex_param red_param;
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/* Set RED to begin dropping packets when there are pass_thresh buffers
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left. It will linearly drop more packets until reaching drop_thresh
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buffers */
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red_marks.u64 = 0;
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red_marks.s.drop = drop_thresh;
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red_marks.s.pass = pass_thresh;
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cvmx_write_csr(CVMX_IPD_QOSX_RED_MARKS(queue), red_marks.u64);
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/* Use the actual queue 0 counter, not the average */
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red_param.u64 = 0;
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red_param.s.prb_con =
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(255ul << 24) / (red_marks.s.pass - red_marks.s.drop);
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red_param.s.avg_con = 1;
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red_param.s.new_con = 255;
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red_param.s.use_pcnt = 1;
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cvmx_write_csr(CVMX_IPD_RED_QUEX_PARAM(queue), red_param.u64);
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return 0;
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}
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/**
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* Setup Random Early Drop to automatically begin dropping packets.
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*
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* @pass_thresh:
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* Packets will begin slowly dropping when there are less than
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* this many packet buffers free in FPA 0.
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* @drop_thresh:
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* All incomming packets will be dropped when there are less
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* than this many free packet buffers in FPA 0.
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* Returns Zero on success. Negative on failure
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*/
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int cvmx_helper_setup_red(int pass_thresh, int drop_thresh)
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{
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union cvmx_ipd_portx_bp_page_cnt page_cnt;
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union cvmx_ipd_bp_prt_red_end ipd_bp_prt_red_end;
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union cvmx_ipd_red_port_enable red_port_enable;
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int queue;
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int interface;
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int port;
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/* Disable backpressure based on queued buffers. It needs SW support */
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page_cnt.u64 = 0;
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page_cnt.s.bp_enb = 0;
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page_cnt.s.page_cnt = 100;
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for (interface = 0; interface < 2; interface++) {
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for (port = cvmx_helper_get_first_ipd_port(interface);
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port < cvmx_helper_get_last_ipd_port(interface); port++)
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cvmx_write_csr(CVMX_IPD_PORTX_BP_PAGE_CNT(port),
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page_cnt.u64);
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}
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for (queue = 0; queue < 8; queue++)
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cvmx_helper_setup_red_queue(queue, pass_thresh, drop_thresh);
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/* Shutoff the dropping based on the per port page count. SW isn't
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decrementing it right now */
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ipd_bp_prt_red_end.u64 = 0;
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ipd_bp_prt_red_end.s.prt_enb = 0;
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cvmx_write_csr(CVMX_IPD_BP_PRT_RED_END, ipd_bp_prt_red_end.u64);
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red_port_enable.u64 = 0;
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red_port_enable.s.prt_enb = 0xfffffffffull;
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red_port_enable.s.avg_dly = 10000;
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red_port_enable.s.prb_dly = 10000;
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cvmx_write_csr(CVMX_IPD_RED_PORT_ENABLE, red_port_enable.u64);
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return 0;
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}
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/**
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* Setup the common GMX settings that determine the number of
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* ports. These setting apply to almost all configurations of all
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* chips.
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*
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* @interface: Interface to configure
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* @num_ports: Number of ports on the interface
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*
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* Returns Zero on success, negative on failure
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*/
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int __cvmx_helper_setup_gmx(int interface, int num_ports)
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{
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union cvmx_gmxx_tx_prts gmx_tx_prts;
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union cvmx_gmxx_rx_prts gmx_rx_prts;
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union cvmx_pko_reg_gmx_port_mode pko_mode;
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union cvmx_gmxx_txx_thresh gmx_tx_thresh;
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int index;
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/* Tell GMX the number of TX ports on this interface */
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gmx_tx_prts.u64 = cvmx_read_csr(CVMX_GMXX_TX_PRTS(interface));
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gmx_tx_prts.s.prts = num_ports;
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cvmx_write_csr(CVMX_GMXX_TX_PRTS(interface), gmx_tx_prts.u64);
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/* Tell GMX the number of RX ports on this interface. This only
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** applies to *GMII and XAUI ports */
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if (cvmx_helper_interface_get_mode(interface) ==
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CVMX_HELPER_INTERFACE_MODE_RGMII
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|| cvmx_helper_interface_get_mode(interface) ==
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CVMX_HELPER_INTERFACE_MODE_SGMII
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|| cvmx_helper_interface_get_mode(interface) ==
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CVMX_HELPER_INTERFACE_MODE_GMII
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|| cvmx_helper_interface_get_mode(interface) ==
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CVMX_HELPER_INTERFACE_MODE_XAUI) {
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if (num_ports > 4) {
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cvmx_dprintf("__cvmx_helper_setup_gmx: Illegal "
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"num_ports\n");
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return -1;
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}
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gmx_rx_prts.u64 = cvmx_read_csr(CVMX_GMXX_RX_PRTS(interface));
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gmx_rx_prts.s.prts = num_ports;
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cvmx_write_csr(CVMX_GMXX_RX_PRTS(interface), gmx_rx_prts.u64);
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}
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/* Skip setting CVMX_PKO_REG_GMX_PORT_MODE on 30XX, 31XX, and 50XX */
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if (!OCTEON_IS_MODEL(OCTEON_CN30XX) && !OCTEON_IS_MODEL(OCTEON_CN31XX)
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&& !OCTEON_IS_MODEL(OCTEON_CN50XX)) {
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/* Tell PKO the number of ports on this interface */
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pko_mode.u64 = cvmx_read_csr(CVMX_PKO_REG_GMX_PORT_MODE);
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if (interface == 0) {
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if (num_ports == 1)
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pko_mode.s.mode0 = 4;
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else if (num_ports == 2)
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pko_mode.s.mode0 = 3;
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else if (num_ports <= 4)
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pko_mode.s.mode0 = 2;
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else if (num_ports <= 8)
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pko_mode.s.mode0 = 1;
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else
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pko_mode.s.mode0 = 0;
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} else {
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if (num_ports == 1)
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pko_mode.s.mode1 = 4;
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else if (num_ports == 2)
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pko_mode.s.mode1 = 3;
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else if (num_ports <= 4)
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pko_mode.s.mode1 = 2;
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else if (num_ports <= 8)
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pko_mode.s.mode1 = 1;
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else
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pko_mode.s.mode1 = 0;
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}
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cvmx_write_csr(CVMX_PKO_REG_GMX_PORT_MODE, pko_mode.u64);
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}
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/*
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* Set GMX to buffer as much data as possible before starting
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* transmit. This reduces the chances that we have a TX under
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* run due to memory contention. Any packet that fits entirely
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* in the GMX FIFO can never have an under run regardless of
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* memory load.
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*/
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gmx_tx_thresh.u64 = cvmx_read_csr(CVMX_GMXX_TXX_THRESH(0, interface));
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if (OCTEON_IS_MODEL(OCTEON_CN30XX) || OCTEON_IS_MODEL(OCTEON_CN31XX)
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|| OCTEON_IS_MODEL(OCTEON_CN50XX)) {
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/* These chips have a fixed max threshold of 0x40 */
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gmx_tx_thresh.s.cnt = 0x40;
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} else {
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/* Choose the max value for the number of ports */
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if (num_ports <= 1)
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gmx_tx_thresh.s.cnt = 0x100 / 1;
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else if (num_ports == 2)
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gmx_tx_thresh.s.cnt = 0x100 / 2;
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else
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gmx_tx_thresh.s.cnt = 0x100 / 4;
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}
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/*
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* SPI and XAUI can have lots of ports but the GMX hardware
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* only ever has a max of 4.
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*/
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if (num_ports > 4)
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num_ports = 4;
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for (index = 0; index < num_ports; index++)
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cvmx_write_csr(CVMX_GMXX_TXX_THRESH(index, interface),
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gmx_tx_thresh.u64);
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return 0;
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}
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/**
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* Returns the IPD/PKO port number for a port on the given
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* interface.
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*
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* @interface: Interface to use
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* @port: Port on the interface
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*
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* Returns IPD/PKO port number
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*/
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int cvmx_helper_get_ipd_port(int interface, int port)
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{
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switch (interface) {
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case 0:
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return port;
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case 1:
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return port + 16;
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case 2:
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return port + 32;
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case 3:
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return port + 36;
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}
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return -1;
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}
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/**
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* Returns the interface number for an IPD/PKO port number.
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*
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* @ipd_port: IPD/PKO port number
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*
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* Returns Interface number
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*/
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int cvmx_helper_get_interface_num(int ipd_port)
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{
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if (ipd_port < 16)
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return 0;
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else if (ipd_port < 32)
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return 1;
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else if (ipd_port < 36)
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return 2;
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else if (ipd_port < 40)
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return 3;
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else
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cvmx_dprintf("cvmx_helper_get_interface_num: Illegal IPD "
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"port number\n");
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return -1;
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}
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/**
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* Returns the interface index number for an IPD/PKO port
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* number.
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*
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* @ipd_port: IPD/PKO port number
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*
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* Returns Interface index number
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*/
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int cvmx_helper_get_interface_index_num(int ipd_port)
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{
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if (ipd_port < 32)
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return ipd_port & 15;
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else if (ipd_port < 36)
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return ipd_port & 3;
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else if (ipd_port < 40)
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return ipd_port & 3;
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else
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cvmx_dprintf("cvmx_helper_get_interface_index_num: "
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"Illegal IPD port number\n");
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return -1;
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}
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