Thierry Reding 57b17ae71f gpu: host1x: mipi: Registers are 32 bits wide ... On 64-bit platforms an unsigned long would be 64 bit and cause unnecessary casting when being passed to writel() or returned from readl(). Make register values 32 bits wide to avoid that. Signed-off-by: Thierry Reding <treding@nvidia.com>		2014-11-13 16:11:48 +01:00
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drm	drm/tegra: Depend on COMMON_CLK	2014-11-13 16:10:27 +01:00
host1x	gpu: host1x: mipi: Registers are 32 bits wide	2014-11-13 16:11:48 +01:00
ipu-v3	IPUv3 fixes for v3.18	2014-10-07 14:31:14 +10:00
vga	Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip	2014-10-13 16:23:15 +02:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00