OpenCloudOS-Kernel/arch/mips/alchemy
Manuel Lauss 564365b0fc MIPS: Alchemy: Fix up PM code on Au1550/Au1200
Au1550/Au1200 have a different memory controller which requires additi-
onal code to properly put memory to sleep (code taken from AMD/RMI's
Linux-2.6.11 source package).

Also fix up the remaining pm-related paths to compile on Au1200/Au1550
platforms.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
..
common MIPS: Alchemy: Fix up PM code on Au1550/Au1200 2009-01-11 09:57:27 +00:00
devboards MIPS: Alchemy: pb1200: update CPLD cascade irq handler. 2009-01-11 09:57:26 +00:00
mtx-1 MIPS: Alchemy: update core interrupt code. 2009-01-11 09:57:26 +00:00
xxs1500 MIPS: Alchemy: update core interrupt code. 2009-01-11 09:57:26 +00:00
Kconfig MIPS: Alchemy: RTC counter clocksource / clockevent support. 2009-01-11 09:57:27 +00:00